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IDT54FCT16652ATPV Datasheet

  • IDT54FCT16652ATPV

  • FAST CMOS 16-BIT BUS TRANSCEIVER/ REGISTERS

  • 9頁(yè)

  • IDT

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FAST CMOS 16-BIT BUS
IDT54/74FCT16652T/AT/CT/ET
IDT54/74FCT162652T/AT/CT/ET
TRANSCEIVER/
REGISTERS
Integrated Device Technology, Inc.
FEATURES:
鈥?Common features:
鈥?0.5 MICRON CMOS Technology
鈥?High-speed, low-power CMOS replacement for
ABT functions
鈥?/div>
Typical t
SK
(o) (Output Skew) < 250ps
鈥?Low input and output leakage
鈮?碌A(chǔ)
(max.)
鈥?ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
鈥?Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP,15.7 mil pitch TVSOP and 25 mil pitch Cerpack
鈥?Extended commercial range of -40擄C to +85擄C
鈥?V
CC
= 5V
鹵10%
鈥?Features for FCT16652T/AT/CT/ET:
鈥?High drive outputs (-32mA I
OH
, 64mA I
OL
)
鈥?Power off disable outputs permit 鈥渓ive insertion鈥?/div>
鈥?Typical V
OLP
(Output Ground Bounce) < 1.0V at
V
CC
= 5V, T
A
= 25擄C
鈥?Features for FCT162652T/AT/CT/ET:
鈥?Balanced Output Drivers:
鹵24mA
(commercial),
鹵16mA
(military)
鈥?Reduced system switching noise
鈥?Typical V
OLP
(Output Ground Bounce) < 0.6V at
V
CC
= 5V,T
A
= 25擄C
DESCRIPTION:
The FCT16652T/AT/CT/ET and FCT162652T/AT/CT/ET
16-bit registered transceivers are built using advanced dual
metal CMOS technology. These high-speed, low-power de-
vices are organized as two independent 8-bit bus transceivers
with 3-state D-type registers. For example, the xOEAB and
x
OEBA
signals control the transceiver functions.
The xSAB and xSBA control pins are provided to select
either real time or stored data transfer. The circuitry used for
select control will eliminate the typical decoding glitch that
occurs in a multiplexer during the transition between stored
and real time data. A LOW input level selects real-time data
and a HIGH level selects stored data.
Data on the A or B data bus, or both, can be stored in the
internal D-flip-flops by LOW-to-HIGH transitions at the appro-
priate clock pins (xCLKAB or xCLKBA), regardless of the
select or enable control pins. Flow-through organization of
signal pins simplifies layout. All inputs are designed with
hysteresis for improved noise margin.
The FCT16652T/AT/CT/ET are ideally suited for driving
high capacitance loads and low-impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.
The FCT162652T/AT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times鈥搑educing
the need for external series terminating resistors. The
FCT162652T/AT/CT/ET are plug-in replacements for the
FCT16652T/AT/CT/ET and ABT16652 for on-board bus inter-
face applications.
FUNCTIONAL BLOCK DIAGRAM
1
OEAB
1
OEBA
1
CLKBA
1
SBA
1
CLKAB
1
SAB
B REG
2
OEAB
2
OEBA
2
CLKBA
2
SBA
2
CLKAB
2
SAB
B REG
D
C
1
A
1
A REG
1
B
1
D
C
2
A
1
A REG
2
B
1
D
C
D
C
TO 7 OTHER CHANNELS
2549 drw 01
TO 7 OTHER CHANNELS
2549 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGE
漏1996
Integrated Device Technology, Inc.
AUGUST 1996
DSC-2549/8
1

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