鈥?Power off disable outputs permit 鈥渓ive insertion鈥?/div>
鈥?Typical V
OLP
(Output Ground Bounce) < 1.0V at
V
CC
= 5V, T
A
= 25擄C
鈥?Features for FCT162245T/AT/CT/ET:
鈥?Balanced Output Drivers:
鹵24mA
(commercial),
鹵16mA
(military)
鈥?Reduced system switching noise
鈥?Typical V
OLP
(Output Ground Bounce) < 0.6V at
V
CC
= 5V,T
A
= 25擄C
DESCRIPTION:
The 16-bit transceivers are built using advanced dual metal
CMOS technology. These high-speed, low-power transceiv-
ers are ideal for synchronous communication between two
busses (A and B). The Direction and Output Enable controls
operate these devices as either two independent 8-bit trans-
ceivers or one 16-bit transceiver. The direction control pin
(xDIR) controls the direction of data flow. The output enable
pin (x
OE
) overrides the direction control and disables both
ports. All inputs are designed with hysteresis for improved
noise margin.
The FCT16245T are ideally suited for driving high-capaci-
tance loads and low-impedance backplanes. The output buff-
ers are designed with power off disable capability to allow "live
insertion" of boards when used as backplane drivers.
The FCT162245T have balanced output drive with current
limiting resistors. This offers low ground bounce, minimal
undershoot, and controlled output fall times鈥?reducing the
need for external series terminating resistors. The
FCT162245T are plug-in replacements for the FCT16245T
and ABT16245 for on-board interface applications.
The FCT166245T are suited for very low noise, point-to-
point driving where there is a single receiver, or a light lumped
FUNCTIONAL BLOCK DIAGRAM
1
DIR
1
OE
1
A
1
1
B
1
1
A
2
1
B
2
1
A
3
1
B
3
1
A
4
1
B
4
1
A
5
1
B
5
1
A
6
1
B
6
1
A
7
1
B
7
1
A
8
1
B
8
2545 drw 01
2
DIR
2
OE
2
A
1
2
B
1
2
A
2
2
B
2
2
A
3
2
B
3
2
A
4
2
B
4
2
A
5
2
B
5
2
A
6
2
B
6
2
A
7
2
B
7
2
A
8
2
B
8
2545 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
漏1996
Integrated Device Technology, Inc.
AUGUST 1996
DSC-2545/9
5.3
1