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IDT54FCT161TPB Datasheet

  • IDT54FCT161TPB

  • FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTERS

  • 7頁(yè)

  • IDT

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Integrated Device Technology, Inc.
FAST CMOS
SYNCHRONOUS
PRESETTABLE
BINARY COUNTERS
DESCRIPTION:
IDT54/74FCT161T/AT/CT
IDT54/74FCT163T/AT/CT
FEATURES:
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Std., A and C speed grades
Low input and output leakage
鈮?碌A(chǔ)
(max.)
CMOS power levels
True TTL input and output compatibility
鈥?V
OH
= 3.3V (typ.)
鈥?V
OL
= 0.3V (typ.)
High drive outputs (-15mA I
OH
, 48mA I
OL
)
Meets or exceeds JEDEC standard 18 specifications
Product available in Radiation Tolerant and Radiation
Enhanced versions
Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
Available in DIP, SOIC, QSOP, CERPACK and LCC
packages
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
The IDT54/74FCT161T/163T, IDT54/74FCT161AT/ 163AT
and IDT54/74FCT161CT/163CT are high-speed synchro-
nous modulo-16 binary counters built using an advanced dual
metal CMOS technology. They are synchronously preset-
table for application in programmable dividers and have two
types of count enable inputs plus a terminal count output for
versatility in forming synchronous multi-stage counters. The
IDT54/74FCT161T/AT/CT have asynchronous Master Reset
inputs that override all other inputs and force the outputs LOW.
The IDT54/74FCT163T/AT/CT have Synchronous Reset in-
puts that override counting and parallel loading and allow the
outputs to be simultaneously reset on the rising edge of the
clock.
FUNCTIONAL BLOCK DIAGRAMS
P
0
PE
'161 '163
CEP
CET
163
ONLY
TC
P
1
P
2
P
3
CP
CP
161
ONLY
CP
D CP D
C
D
Q Q
Q
0
Q
0
DETAIL A
MR ('161)
SR ('163)
Q
0
Q
1
Q
2
Q
3
2611 drw 01
DETAIL
A
DETAIL
A
DETAIL
A
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
漏1995
Integrated Device Technology, Inc.
OCTOBER 1994
DSC-4219/4
6.7
1

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