鈥?/div>
DESCRIPTION:
The FCT3805/A is a 3.3 volt, non-inverting clock driver built
using advanced dual metal CMOS technology. The device
consists of two banks of drivers, each with a 1:5 fanout and its
own output enable control. The device has a "heartbeat"
monitor for diagnostics and PLL driving. The MON output is
identical to all other outputs and complies with the output
specifications in this document. The FCT3805/A offers low
capacitance inputs with hysteresis.
The FCT3805/A is designed for high speed clock distribu-
tion where signal quality and skew are critical. The FCT 3805
also allows single point-to-point transmission line driving in
applications such as address distribution, where one signal
must be distributed to multiple receivers with low skew and
high signal quality.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
V
CCA
OA
1
1
2
3
4
5
6
7
8
9
10
P20-1
D20-1
SO20-2
SO20-7
SO20-8
&
E20-1
20
19
18
17
16
15
14
13
12
11
V
CCB
OB
1
OB
2
OB
3
GND
B
OB
4
OB
5
MON
OE
B
IN
B
3102 drw 02
OE
A
OA
2
OA
3
5
OA
1
-OA
5
GND
A
OA
4
OA
5
IN
A
IN
B
5
OB
1
-OB
5
GND
Q
OE
A
OE
B
MON
3102 drw 01
IN
A
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
V
CCA
V
CCB
OA
2
OA
1
INDEX
3
OA
3
GND
A
OA
4
OA
5
GND
Q
4
5
6
7
8
2
1
20 19
18
17
OB
2
OB
3
GND
B
OB
4
OB
5
OB
1
L20-2
16
15
14
9 10 11 12 13
OE
A
OE
B
IN
A
IN
B
MON
3102 drw 03
LCC
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
漏1996
Integrated Device Technology, Inc.
OCTOBER 1995
DSC-3102/4
9.5
1