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IDT49C466APQF Datasheet

  • IDT49C466APQF

  • 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT

  • 237.91KB

  • 27頁

  • IDT

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64-BIT FLOW-THRU
ERROR DETECTION
AND CORRECTION UNIT
Integrated Device Technology, Inc.
IDT49C466
IDT49C466A
FEATURES:
鈥?64-bit wide Flow-thruEDC鈩?/div>
鈥?Separate System and Memory Data Input/Output Buses
鈥?鈥?Error Detect Time: 10ns
鈥?Error Correct Time: 15ns
鈥?Corrects all single bit errors; Detects all double bit errors
and some multiple bit errors
鈥?Configurable 16-deep bus read/write FIFOs with flags
鈥?Simultaneous check bit generation and correction of memory
data
鈥?Supports partial word writes on byte boundaries
鈥?Low noise output
鈥?Sophisticated error diagnostics and error logging
鈥?Parity generation on system data bus
鈥?208-pin Plastic Quad Flatpack
DESCRIPTION:
The IDT49C466/A 64-bit Flow-thruEDC is a high-speed
error detection and correction unit that ensures data integrity
in memory systems. The flow-thru architecture, with separate
system and memory data buses, is ideally suited for pipelined
memory systems.
Implementing a modified Hamming code, the
IDT49C466/A corrects all single bit hard and soft errors, and
detects all double bit errors. The read/write FIFOs can store
up to sixteen words. FIFO full and empty flags indicate
whether additional data can be written to or read from the
EDC.
Check bit generation for partial word writes on byte bound-
aries is supported on the IDT49C466/A.
Diagnostic features include a check bit register, syndrome
registers, a four bit error counter which logs up to 15 errors,
and an error data register which stores the complete error data
word. Parity can be generated and checked on the system
bus by the IDT49C466/A.
SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM
DIAGNOSTIC
& STATUS
REGISTERS
ERR
MERR
READ BUFFER
16 WORDS BY
64
MD
LATCH
OUT
CHECK-BIT
COMPARATOR &
SYNDROME
GENERATOR &
ERROR
DETECTOR
M
U
X
ERROR
CORRECT
MD
CHECK-BIT
GENERATOR
MD
CHK-BIT
LATCH
CBI0-7
M
U
X
MD
LATCH
IN
SD0-63
WRITE BACK PATH
SD
LATCH
IN
WRITE
BUFFER
16 WORDS BY
72
PARITY
GENERATE &
PARITY CHECK
M
U
X
B
Y
T
E
M
U
X
SD
CHECK-BIT
GENERATOR
MD0-63
SD
LATCH
OUT
SD
CHK-BIT
LATCH
CBSYN0-7
PARITY
P0-7
2617 drw 01
The IDT logo is a registered trademark and Flow-thruEDC is a trademark of Integrated Device Technology Inc.
COMMERCIAL TEMPERATURE RANGES
漏1996
Integrated Device Technology, Inc.
AUGUST 1996
11.7
DSC-2617/9
1

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