鈥?/div>
IOAPIC Output Jitter: <500ps
48MHz, 3V66, PCI Output Jitter: <500ps)
Functionality
FS4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FS3 FS2
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
FS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
FS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
CPU
103.00
105.00
100.45
100.90
107.10
109.00
112.00
114.00
116.00
118.00
133.30
120.00
122.00
125.00
128.21
130.00
132.00
133.90
138.00
142.00
146.00
150.00
153.00
156.00
159.00
162.00
165.00
168.00
171.00
174.00
177.00
180.00
PCI
3V 66
34.33
68.67
35.00
70.00
33.483 66.967
33.63
67.27
35.700 71.400
36.33
72.67
37.34
74.67
28.50
57.00
29.00
58.00
29.50
59.00
33.33
66.65
30.00
60.00
30.50
61.00
31.25
62.50
32.05 64.105
32.50
65.00
33.00
66.00
33.48
66.95
34.50
69.00
35.50
71.00
36.50
73.00
37.50
75.00
38.25
76.50
39.00
78.00
39.75
79.50
40.50
81.00
41.25
82.50
42.00
84.00
42.75
85.50
43.50
87.00
44.25
88.50
45.00
90.00
IOAPIC
17.17
17.50
16.742
16.82
17.850
18.17
18.67
14.25
14.50
14.75
16.66
15.00
15.25
15.63
16.026
16.25
16.50
16.74
17.25
17.75
18.25
18.75
19.13
19.50
19.88
20.25
20.63
21.00
21.38
21.75
22.13
22.50
Block Diagram
PLL2
/2
X1
X2
XTAL
OSC
PLL1
Spread
Spectrum
48MHz
24_48MHz
REF (1:0)
CPU
DIVDER
CPUCLK (2:0)
/2
CPU/2
SEL24_48#
FREQ_APIC
SDATA
SCLK
FS (4:0)
PD#
Control
Logic
Config.
Reg.
IOAPIC
DIVDER
IOAPIC (2:0)
PCI
DIVDER
PCICLK (9:0)
PCICLK_F
3V66
DIVDER
3V66 (2:0)
9248-134 Rev A 8/22/00
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
ICS9248-134