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Integrated

Circuit

Systems, Inc.

ICS9248-162

Frequency Generator & Integrated Buffers for PENTIUM/Pro

TM

& K6

General Description

The

ICS9248-162

is the single chip clock solution for various

mobile chipset platforms. It provides all necessary clock signals

for such a system.

Spread spectrum may be enabled through I

2

C programming.

Spread spectrum typically reduces system EMI by 8dB to

10dB. This simplifies EMI qualification without resorting to

board design iterations or costly shielding. The

ICS9248-162

employs a proprietary closed loop design, which tightly

controls the percentage of spreading over process and

temperature variations.

Features

聲

聲

聲

聲

Up to 137MHz frequency support

Spread Spectrum for EMI control

Serial I

2

C interface for Power Management,

Frequency Select, Spread Spectrum.

Provides the following system clocks

- 4-CPUs @ 2.5/3.3V, up to 137MHz.

(including CPUCLK_F)

- 9-SDRAMs @3.3V, up to 137MHz

(including SDRAM_F)

- 8-PCI @3.3V, CPU/2 or CPU/3

(including 1 free running PCICLK_F)

- 1-24/48MHz @3.3V

- 1-48MHz @3.3V fixed

- 2-REF @3.3V, 14.318MHz.

Efficient Power management scheme through PCI

and CLK STOP CLOCKS

Spread Spectrum 鹵 .25%, & 0 to -0.5% down spread

聲

聲

Block Diagram

PLL2

48MHz

/2

X1

X2

BUFFER IN

CPUCLK_F

PLL1

Spread

Spectrum

FS(3:0)

SEL24_48#

STOP

Pin Configuration

VDDREF

REF0

GNDREF

X1

X2

VDDPCI

*CPU2.5_3.3#/PCICLK_F

*FS3/PCICLK0

GNDPCI

*SEL24_48#/PCICLK1

PCICLK2

PCICLK3

PCICLK4

VDDPCI

BUFFER IN

GNDPCI

PCICLK5

PCICLK6

VDDCOR

PCI_STOP#

*PD#

GND48

SDATA

SCLK

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

REF1/FS2*

VDDLCPU

CPUCLK_F

CPUCLK0

GNDLCPU

CPUCLK1

CPUCLK2

CLK_STOP#

GNDSDR

SDRAM_F

SDRAM0

SDRAM1

VDDSDR

SDRAM2

SDRAM3

GNDSDR

SDRAM4

SDRAM5

VDDSDR

SDRAM6

SDRAM7

VDD48

48MHz/FS0*

24_48MHz/FS1*

24_48MHz

2

XTAL

OSC

REF(1:0)

3

CPUCLK (2:0)

LATCH

STOP

8

SDRAM (7:0)

SDRAM_F

POR

CLK_STOP#

PCI_STOP#

CPU2.5_3.3#

SDATA

SCLK

PD#

Control

Logic

Config.

Reg.

PCI

CLOCK

DIVDER

STOP

7

PCICLK (6:0)

PCICLK_F

Power Groups

VDDLCPU, GNDLCPU = CPUCLK [2:0], CPUCLK_F

VDDSDR, GNDSDR = SDRAMCLKS [7:0], SDRAM_F

VDDPCI, GNDPCI = PCICLKS [6:0], PCICLK_F

VDD48, GND48 = 48MHz, 24MHz

VDDREF, GNDREF = REF, X1, X2

VDDCOR = PLL CORE

9248-162 Rev A 8/31/00

48-Pin SSOP and TSSOP

* Internal Pull-up Resistor of 120K to VDD

Pentium is a trademark of Intel Corporation

I

2

C is a trademark of Philips Corporation

ICS reserves the right to make changes in the device data identified in

this publication without further notice. ICS advises its customers to

obtain the latest version of all device data to verify that any

information being relied upon by the customer is current and accurate.

ICS9248-162

next

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