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ICS9248F-151-T Datasheet

  • ICS9248F-151-T

  • Frequency Generator & Integrated Buffers for Celeron & PII/I...

  • 14頁

  • ICS

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Integrated
Circuit
Systems, Inc.
ICS9248-151
Frequency Generator & Integrated Buffers for Celeron & PII/III鈩?/div>
Recommended Application:
VIA Apollo Pro 266 style chipset.
Output Features:
鈥?/div>
3 - CPUs @ 2.5V, up to 200MHz.
鈥?/div>
3 - IOAPIC @ 2.5V, 錕?frac12; PCI frequency
鈥?/div>
9 - PCI @ 3.3V,
鈥?/div>
1 - 48MHz, @ 3.3V fixed.
鈥?/div>
1 - 24/48MHz @ 3.3V
鈥?/div>
2 - REF @ 3.3V, 14.318MHz.
鈥?/div>
3 - AGP @ 3.3V
Features:
鈥?/div>
Up to 200MHz frequency support
鈥?/div>
Support power management: PCI, CPU stop
and Power Down.
鈥?/div>
Spread spectrum for EMI control (0 to -0.5%, 鹵 0.25%).
鈥?/div>
Uses external 14.318MHz crystal
Skew Specifications:
鈥?/div>
CPU 鈥?CPU: <175ps
鈥?/div>
PCI 鈥?PCI: <500ps
鈥?/div>
CPU(early)-PCI: Min=1.0ns, Max=2.5ns
鈥?/div>
CPU Cycle to cycle jitter: < 250ps
Pin Configuration
VDDREF
GND
X1
X2
AVDD48
*FS3/48MHz
*FS2/24_48MHz
GND
PCICLK_F
PCICLK0
PCICLK1
GND
PCICLK2
PCICLK3
VDDPCI
PCICLK4
PCICLK5
PCICLK6
GND
PCICLK7
*FS1
*FS0
AGPCLK0
VDDAGP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
REF0
REF1/FS4*
VDDLAPIC
IOAPIC0
IOAPIC1
GND
IOAPIC2
VDDLCPU
GND
CPUCLK0
CPUCLK1
VDDLCPU
GND
CPUCLK2/F
CPU_STOP#*
PCI_STOP#*
PD*
AVDD
GND
SDATA
SCLK
AGPCLK2
AGPCLK1
GND
48-Pin 300mil SSOP
* Internal Pull-up Resistor of 120K to VDD
Block Diagram
PLL2
/2
X1
X2
XTAL
OSC
PLL1
Spread
Spectrum
48MHz
24_48MHz
Functionality
FS4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
FS3 FS2
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
FS1 FS0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
CPU
(MHz)
200.00
190.00
180.00
170.00
166.00
160.00
150.00
145.00
140.00
136.00
130.00
124.00
AG P
(MHz)
80.00
76.00
72.00
68.00
66.40
64.00
75.00
72.50
70.00
68.00
65.00
62.00
PCICLK
(MHz)
40.00
38.00
36.00
34.00
33.20
32.00
37.50
36.25
35.00
34.00
32.50
31.00
2
REF (1:0)
CPU
DIVDER
Stop
2
CPUCLK (1:0)
Stop/F
CPUCLK2/F
3
AGPCLK (2:0)
AGP
DIVDER
FS (4:0)
PD#
PCI_STOP#
CPU_STOP#
SDATA
SCLK
Control
Logic
Config.
Reg.
PCI
DIVDER
Stop
IOAPIC
DIVDER
3
IOAPIC (2:0)
ICS9248-151
8
PCICLK (7:0)
PCICLK_F
66.67
100.00
118.00
133.33
66.67
66.67
78.67
66.67
33.34
33.33
39.33
33.34
9248-151 Rev B 01/29/01
Third party brands and names are the property of their respective owners.
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.

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