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Generator for periphary clock chips as companion
device to CPU/SDRAM/PCI generator.
Accepts clock input at X1 pin or crystal across X1,
X2 pins as 14.31818 MHz nominal inputs.
Three REF clock buffer outputs (SREF is Strong)
Two 48MHz and one 24 MHz outputs
Selectable audio clock generator with audio (Audio)
and half speed (Audio/2) outputs
20 pin (209 mil) SSOP package
Block Diagram
Pin Configuration
20-Pin SSOP
Functionality
3.3V鹵10%, 0-70
擄
C
Clock source driving X1 pin or crystal (X1, X2) = 14.31818 MHz
(all frequencies in MHz)
FS1
FS0
AUDIO
AUDIO/2
SREF, REF
48 MHz
24 MHz
OE
0
1
All Outputs
Tristate
Active
0
0
1
1
0
1
0
1
XTAL/2
24.5795
33.8680
LOW
XTAL/4
12.2898
16.9340
LOW
14.318
14.318
14.318
14.318
XTAL/2
48.008
48.008
48.008
XTAL/4
24.004
24.004
24.004
ICS9169C-36RevD060197P
ICS reserves the right to make changes in the device data identified in this publication
without further notice. ICS advises its customers to obtain the latest version of all
device data to verify that any information being relied upon by the customer is current
and accurate.