Integrated
Circuit
Systems, Inc.
ICS9160-03
Preliminary Product Preview
Frequency Generator and Integrated Buffer for PowerPC
廬
General Description
The
ICS9160-03
generates all clocks required for high speed
RISC microprocessor systems based on the PowerPC 603 and
604. Five different frequency multiplying factors are selectable
and offer smooth frequency transitions. BCLK signals are
synchronous to PCLK and operate at PCLK/2 for optimum
synchronous PCI bus performance. The multiplying and ratio
factors can be customed for specific applications.
Both individual and group glitch-free stop and start ofthe
clock signals are provided, as well as a power-down mode to
mize power consumption. The individual stop and start is
provided through a serial interface control.
A global output enable pin simplifies production board testing,
and a test mode is available to aid in system design and
diagnostics.
Features
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Generates four processor and seven synchronous
bus clocks plus graphic, floppy, keyboard and
reference clocks
Selectable 33.3/50/60/66.6/80 MHz PCLKs
鹵150ps maximum PowerPC PLL in-band jitter
All synchronous clocks skew matched to 鹵250ps
Individual or group stop-clock control
Power-down modes minimize standby current
Custom configurations available
3.0V - 5.5 supply range
32-pin SOIC package
Pin Configuration
Block Diagram
28-Pin SOIC
9160-03 RevC 06/19/97P
PRODUCT PREVIEW documents contain information on new
products in the sampling or preproduction phase of development.
Characteristic data and other specifications are subject to change
without notice.
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