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ICS9148-12 Datasheet

  • ICS9148-12

  • Pentium/ProTM System Clock Chip

  • 18頁

  • ICS

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Integrated
Circuit
Systems, Inc.
ICS9148-12
Pentium/Pro
TM
System Clock Chip
General Description
The
ICS9148-12
is a Clock Synthesizer chip for Pentium and
PentiumPro CPU based Desktop/Notebook systems that will
provide all necessary clock timing.
Features include four strong CPU, seven PCI and eight
SDRAM clocks. Two reference outputs are available equal to
the crystal frequency. Stronger drive CPUCLK outputs
typically provide greater than 1 V/ns slew rate into 20pF
loads. This device meets rise and fall requirements with 2
loads per CPU output (ie, one clock to CPU and NB chipset,
one clock to two L2 cache inputs).
PWR_DWN# pin allows low power mode by stopping crystal
OSC and PLL stages. For optional power management,
CPU_STOP# can stop CPU (0:3) clocks and PCI_STOP#
will stop PCICLK (0:5) clocks. CPU and IOAPIC output
buffer strength controlled by CPU 3.3_2.5# pin to match
VDDL voltage.
PCICLK outputs typically provide better than 1V/ns slew rate
into 30pF loads while maintaining 50鹵5% duty cycle. The REF
clock outputs typically provide better than 0.5V/ns slew rates.
The
ICS9148-12
accepts a 14.318MHz reference crystal or
clock as its input and runs on a 3.3V core supply.
Features
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CPU outputs are stronger drive for multiple loads per pin
(ie CPU and NB on one pin)
Generates system clocks for CPU, IOAPIC, SDRAM,
PCI, plus 14.314 MHz REF(0:1), USB, Plus Super I/O
Supports single or dual processor systems
I
2
C serial configuration interface provides output clock
disabling and other functions
MODE input pin selects optional power management
input control pins
Two fixed outputs separately selectable as 24 or 48MHz
Separate 2.5V and 3.3V supply pins
2.5V or 3.3V outputs: CPU, IOAPIC
3.3V outputs: SDRAM, PCI, REF, 48/24 MHz
CPU 3.3_2.5# logic pin to adjust output strength
No power supply sequence requirements
Uses external 14.318MHz crystal
48 pin 300 mil SSOP and 240 mil TSSOP
Output enable register
for serial port control:
1 = enable
0 = disable
Pin Configuration
Block Diagram
48-Pin SSOP & TSSOP
VDD (1:4) 3.3V鹵10%, VDDL1, 2 2.5鹵5% or 3.3鹵10% 0-70
擄
C
Crystal (X1, X2) = 14.31818 MHz
SEL
0
Pentium is a trademark on Intel Corporation.
9148-12 Rev F 4/1/99
Functionality
CPUCLK, SDRAM
(MHz)
60
66.6
PCICLK
(MHz)
30
33.3
1
ICS reserves the right to make changes in the device data identified in this
publication without further notice. ICS advises its customers to obtain the latest
version of all device data to verify that any information being relied upon by the
customer is current and accurate.

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