Integrated
Circuit
Systems, Inc.
ICS9147-09
Frequency Generator & Integrated Buffers for 686 Series CPUs
General Description
The
ICS9147-09
generates all clocks required for high
speed RISC or CISC microprocessor systems such as Intel
PentiumPro,AMD or Cyrix processors. Four bidirectional I/O
pins (FS0, FS1, FS2, BSEL) are latched at power-on to the
functionality table. The Six BUS clocks can be selected as
either synchronous at 1/2 CPU speed or asynchronous at
32MHz selected by BSEL latched input.The inputs provide
for tristate and test mode conditions to aid in system level
testing.These multiplying factors can be customized for
specific applications. Glitch-free stop clock controls
provided for CPU.
High drive BUS and SDRAM outputs typically provide
greater than 1 V/ns slew rate into 30 pF loads. CPU outputs
typically provide better than 1V/ns slew rate into 20pF
loads while maintaining 50鹵5% duty cycle. The REF clock
outputs typically provide better than 0.5V/ns slew rates.
Seperate buffer supply pin VDDL allows for nominal 3.3V
voltage or reduced voltage swing (from 2.9 to 2.5V) for
CPUL (1:2) and IOAPIC outputs.
Features
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Total of 15 CPU speed clocks:
- Two copies of CPU clock with VDDL (2.5 to 3.3V)
- Twelve (12) SDRAM (3.3v) plus one
CPUH/AGP (3.3V) clocks
Six copies of BUS clock (synchronous with CPU clock/2 or
asynchronous 32 MHz)
250ps output skew window for CPU andSDRAM clocks
and 500ps window BUS clocks. CPU clocks to
BUSclocks skew 1-4ns (CPU early)
Two copies of Ref. clock @14.31818 MHz (One driven
by VDDL as IOAPIC)
One 48 MHz (3.3 V TTL) for USB support and single
24 MHz.
Separate VDDL for CPUL (1:2) clock buffers and
IOAPIC to allow 2.5V output (or Std. Vdd)
3.0V 聳 3.7V supply range w/2.5V compatible outputs
48-pin SSOP package
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Block Diagram
Pin Configuration
48-Pin SSOP
Pentium is a trademark of Intel Corporation
9147-09 Rev A 10/2897P
ICS reserves the right to make changes in the device data identified in this
publication without further notice. ICS advises its customers to obtain the latest
version of all device data to verify that any information being relied upon by the
customer is current and accurate.
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