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ICS9112YM-27-T Datasheet

  • ICS9112YM-27-T

  • Low Skew PCI / PCI-X Buffer

  • 8頁

  • ICS

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Integrated
Circuit
Systems, Inc.
ICS9112-27
Preliminary Product Preview
Low Skew PCI / PCI-X Buffer
General Description
The
ICS9112-27
is a high performance, low skew, low jitter
PCI / PCI-X clock driver. It is designed to distribute high
speed signals in PCI / PCI-X applications operating at speeds
from 0 to 140 MHz.
The
ICS9112-27
is characterized for operation from -40擄C to
85擄C for automotive and industrial applications.
Features
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Frequency range 0 - 140 MHz (3.3V)
Less than 200 ps Jitter between outputs
Skew controlled outputs < 100 ps
Distribute one clock input to one bank of four
outputs
3.3V 鹵10% operation
Available in 8 pin TSSOP, and SOIC packages.
Block Diagram
OE
LOGIC
CONTROL
Pin Configuration
CLK_IN
1
2
3
4
ICS9112-27
8
7
6
5
CLK3
CLK2
VDD
CLK1
CLK0
OE
CLK0
CLK1
CLK_IN
CLK2
GND
8 pin TSSOP & SOIC
Functionality Table
CLK3
INPUTS
CLK_IN
0
0
1
OE
0
1
0
1
OUTPUTS
CLK(3:0)
0
0
0
1
Pin Descriptions
PIN NUMBER
1
2
3
4
5
6
7
8
PIN NAME
CLK_IN
OE
CLK0
GND
CLK1
VDD
CLK2
CLK3
TYPE
IN
IN
OUT
PWR
OUT
PWR
OUT
OUT
Input reference frequency.
1
DESCRIPTION
Output enable (has internal pull_up.) when OE is low, it tristates the clock
outputs
Buffered clock output
Ground
Buffered clock output
Power supply for 3.3V
Buffered clock output
Buffered clock output
9112-27 Rev B 02/27/01
PRODUCT PREVIEW documents contain information on new
products in the sampling or preproduction phase of development.
Characteristic data and other specifications are subject to change
without notice.

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