crystal input. The REF_CLK input accepts
HiPerClockS鈩?/div>
LVCMOS or LVTTL input levels. The ICS87608I
has a fully integrated PLL along with frequency
configurable clock and feedback outputs for
multiplying and regenerating clocks with 鈥渮ero delay鈥?
ICS
The ICS87608I is a 1:8 PCI/PCI-X Clock Generator and a
member of the HiPerClockS
TM
family of high performance clock
solutions from ICS. The ICS87608I has a selectable REF_CLK
or crystal input. The REF_CLK input accepts LVCMOS or
LVTTL input levels. The ICS87608I has a fully integrated PLL
along with frequency configurable clock and feedback outputs
for multiplying and regenerating clocks with 鈥渮ero delay鈥? The
PLL鈥檚 VCO has an operating range of 250MHz-500MHz,
allowing this device to be used in a variety of general purpose
clocking applications. For PCI/PCI-X applications in particular,
the VCO frequency should be set to 400MHz. This can be
accomplished by supplying 33.33MHz, 25MHz, 20MHz, or
16.66MHz on the reference clock or crystal input and by
selecting 梅12, 梅16, 梅20, or 梅24, respectively as the feedback
divide value. The dividers on each of the two output banks
can then be independently configured to generate 33.33MHz
(梅12), 66.66MHz (梅6), 100MHz (梅4), or 133.33MHz (梅3).
The ICS87608I is characterized to operate with its core supply
at 3.3V and each bank supply at 3.3V or 2.5V. The ICS87608I
is packaged in a small 7x7mm body LQFP, making it ideal for
use in space-constrained applications.
P
IN
A
SSIGNMENT
REF_IN
V
DDOA
XTAL2
XTAL1
32 31 30 29 28 27 26 25
QA0
QA1
GND
QA2
QA3
V
DDOA
MR
DIV_SELA0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
DIV_SELA1
DIV_SELB0
DIV_SELB1
FBDIV_SEL0
FBDIV_SEL1
V
DD
FB_IN
GND
ICS87608I
32-Lead LQFP
7mm x 7mm x 1.4mm
package body
Y package
Top View
XTAL_SEL
PLL_SEL
V
DDA
24
23
22
21
20
19
18
17
QB0
QB1
GND
QB2
QB3
V
DDOB
REF_OUT
FB_OUT
87608AYI
www.icst.com/products/hiperclocks.html
1
REV. B MARCH 11, 2005