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ICS84021AYT Datasheet

  • ICS84021AYT

  • 260MHZ, CRYSTAL-TO-LVCMOS / LVTTL FREQUENCY SYNTHESIZER

  • 14頁

  • ICS

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Integrated
Circuit
Systems, Inc.
ICS84021
260MH
Z
, C
RYSTAL
-
TO
-LVCMOS / LVTTL
F
REQUENCY
S
YNTHESIZER
F
EATURES
鈥?/div>
2 LVCMOS/LVTTL outputs
鈥?/div>
Selectable crystal oscillator interface
or LVCMOS/LVTTL TEST_CLK
鈥?/div>
Output frequency range: 103.3MHz to 260MHz
鈥?/div>
Crystal input frequency range: 14MHz to 40MHz
鈥?/div>
VCO range: 620MHz to 780MHz
鈥?/div>
Parallel or serial interface for programming counter
and output dividers
鈥?/div>
RMS period jitter: 4.3ps (typical) (N
梅
4, V
DDO
= 3.3V 鹵 5%)
鈥?/div>
RMS phase jitter at 155.52MHz, using a 38.88MHz crystal
(12KHz to 20MHz): 2.88ps (typical)
Phase noise: 155.52MHz
Offset
Noise Power
100Hz ................. -93.7 dBc/Hz
1KHz ............... -111.3 dBc/Hz
10KHz ............... -120.4 dBc/Hz
100KHz ............... -125.1 dBc/Hz
鈥?/div>
Full 3.3V or mixed 3.3V core/2.5V or 1.8V supply voltage
鈥?/div>
0擄C to 70擄C ambient operating temperature
鈥?/div>
Industrial temperature information available upon request
G
ENERAL
D
ESCRIPTION
The ICS84021 is a general purpose, Crystal-to-
LVCMOS/LVTTL High Frequency Synthesizer
HiPerClockS鈩?/div>
and a member of the HiPerClockS鈩?family of
High Performance Clock Solutions from ICS. The
ICS84021 has a selectable TEST_CLK or crys-
tal input. The VCO operates at a frequency range of 620MHz
to 780MHz. The VCO frequency is programmed in steps
equal to the value of the input reference or crystal frequency.
The VCO and output frequency can be programmed using
the serial or parallel interface to the configuration logic. The
low phase noise characteristics of the ICS84021 make it an
ideal clock source for Gigabit Ethernet, SONET, Fibre Chan-
nel 1 and 2, and Infiniband applications.
ICS
B
LOCK
D
IAGRAM
OE0
OE1
VCO_SEL
P
IN
A
SSIGNMENT
VCO_SEL
nP_LOAD
XTAL1
M4
M3
M2
M1
M0
32 31 30 29 28 27 26 25
XTAL_SEL
TEST_CLK
XTAL1
OSC
XTAL2
1
0
M5
M6
M7
M8
N0
N1
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
VCO
梅
M
0
1
梅3
梅4
梅5
梅6
TEST
V
DD
OE1
OE0
V
DDO
Q1
Q0
GND
24
23
22
XTAL2
TEST_CLK
XTAL_SEL
V
DDA
S_LOAD
S_DATA
S_CLOCK
MR
ICS84021
21
20
19
18
17
PLL
PHASE DETECTOR
MR
nc
GND
Q0
Q1
S_LOAD
S_DATA
S_CLOCK
nP_LOAD
M0:M8
N0:N1
84021AY
CONFIGURATION
INTERFACE
LOGIC
TEST
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
www.icst.com/products/hiperclocks.html
1
REV. A NOVEMBER 7, 2003

ICS84021AYT相關(guān)型號(hào)PDF文件下載

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