P R E L I M I N A RY I N F O R M AT I O N
ICS554-01
L
OW
S
KEW
1
TO
4 C
LOCK
B
UFFER
PECL I
N
, PECL O
UT
Description
The ICS554-01 is a low skew clock buffer with a single
complimentary PECL input to four PECL outputs. Part
of ICS鈥?Clock Blocks
TM
family, this is our lowest skew
PECL clock buffer. For parts which do not require PECL
inputs or outputs, see the ICS553 for a 1 to 4 low skew
buffer, or the ICS552-02 for a 1 to 8 low skew buffer. For
more than 8 outputs see the MK74CBxxx Buffalo
TM
series of clock drivers.
ICS makes many non-PLL and PLL based low skew
output devices as well as Zero Delay Buffers to
synchronize clocks. Contact us for all of your clocking
needs.
Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Outputs are skew matched to within 50ps
Packaged in 16 pin TSSOP
One PECL input to 4 PECL output clock drivers
Operating Voltages of 3.3V to 5V
Block Diagram
VDD
62鈩?/div>
62鈩?/div>
IN
IN
270鈩?/div>
Q0
270鈩?/div>
Q0
VDD
62鈩?/div>
62鈩?/div>
Q1
VDD
62鈩?/div>
62鈩?/div>
270鈩?/div>
270鈩?/div>
Q1
Q2
270鈩?/div>
270鈩?/div>
Q2
VDD
62鈩?/div>
62鈩?/div>
Q3
VDD
1.1k鈩?/div>
0.01mF
270鈩?/div>
270鈩?/div>
Q3
RES
MDS 554-01 A
In tegr ated C ir cu it S yst ems
G
1
5 25 Ra ce Str eet, San Jose, C A 95 126
G
Revision 031901
tel ( 408) 2 95-9 800
G
www. i c s t. c om
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1
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