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ICS1887 Datasheet

  • ICS1887

  • FDDI / Fast Ethernet PHYceiverTM

  • 14頁

  • ICS

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Integrated
Circuit
Systems, Inc.
ICS1887
FDDI / Fast Ethernet PHYceiver
TM
General Description
The
ICS1887
is designed to provide high performance clock
recovery and generation for 125 MHz serial data streams. The
ICS1887 is ideally suited for LAN transceiver applications in
either FDDI or Fast Ethernet environments. The
ICS1887
converts NRZ to/from NRZI data in addition to providing a
5-bit parallel digital data transmit and receive interface.
Clock and data recovery is performed on an input serial data
stream or the buffered transmit data depending upon the state
of the loopback input. A continuous clock source will
continue to be present even in the absence of input data.
All internal timing is derived from either a low cost crystal,
differential or single-ended source.
The
ICS1887
utilizes advanced CMOS phase-locked loop
technology which combines high performance and low power
at a greatly reduced cost.
Features
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Single IC solution to existing designs requiring
multiple devices
Data and clock recovery for 125 MBaud FDDI or Fast
Ethernet applications
Clock multiplication from either a crystal, differential
or single-ended timing source
Continuous clock in the absence of data
No external PLL components
Lock/Loss status indicator output
Loopback mode for system diagnostics
Selectable loop timing mode
PECL driver with settable sink current
Parallel digital transmit and receive data interface
NRZ to/from NRZI data conversion
Consult ICS for optional configurations and data rates
Block Diagram
Pin Configuration
28-Pin SOIC
PHYceiver is a trademark of Integrated Circuit Systems, Inc.
ICS1887RevF112596

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