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HYS72D64020GU-7-A Datasheet

  • HYS72D64020GU-7-A

  • ?512MB (64Mx72) PC2100 2-bank?

  • 24頁

  • ETC

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HYS64/72D16x01/32x00/64x20GU-6/7/8-B
Unbuffered DDR-I SDRAM-Modules
2.5 V 184-pin Unbuffered DDR-I SDRAM Modules
128MByte, 256 MByte & 512 MByte Modules
PC1600, PC2100, PC2700
Preliminary Datasheet revision 0.94
鈥?184-pin Unbuffered 8-Byte Dual-In-Line
DDR-I SDRAM non-parity and ECC-Modules
for PC and Server main memory applications
鈥?One bank 16M x 64, 32M
脳
64, 32M x 72 and
two bank 64M x 64, 64M
脳
72 organization
鈥?JEDEC standard Double Data Rate
Synchronous DRAMs (DDR-I SDRAM)
Single + 2.5 V (
鹵
0.2 V) power supply
鈥?Built with 256 Mbit DDR-I SDRAMs in 66-
Lead TSOPII package
鈥?Programmable CAS Latency, Burst Length,
and Wrap Sequence (Sequential &
Interleave)
鈥?Performance:
-6
Component Speed Grade
Module Speed Grade
f
CK
f
CK
鈥?Auto Refresh (CBR) and Self Refresh
鈥?All inputs and outputs SSTL_2 compatible
鈥?Serial Presence Detect with E
2
PROM
鈥?Jedec standard MO-206 form factor:
133.35 mm
脳
31.75 mm
脳
4.00 mm max.
鈥?Jedec standard reference layout
鈥?Gold plated contacts
-7/-7F
PC2100
143
133
-8
PC1600
125
100
Unit
DDR333B DDR266A/F DDR200
PC2700
166
133
MHz
MHz
Clock Frequency (max.) @ CL = 2.5
Clock Frequency (max.) @ CL = 2
The HYS64/72D32000GU and HYS64/72D64020GU are industry standard 184-pin 8-byte Dual in-
line Memory Modules (DIMMs) organized as 32M
脳
64 and 64M
脳
64 for non-parity and 32M x 72
and 64M x 72 for ECC main memory applications. The memory array is designed with 256Mbit
Double Data Rate Synchronous DRAMs. A variety of decoupling capacitors are mounted on the PC
board. The DIMMs feature serial presence detect based on a serial E
2
PROM device using the 2-pin
I
2
C protocol. The first 128 bytes are programmed with configuration data and the second 128 bytes
are available to the customer.
INFINEON Technologies
1
2002-10-24 (rev. 0.94)

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