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CAS-before-RAS refresh, RAS-only-refresh
9 decoupling capacitors mounted on substrate
All inputs, outputs and clock fully LVTTL & LVCMOS compatible
4 Byte interleave enabled, Dual Address inputs (A0/B0)
Buffered inputs excepts RAS and DQ
168 pin, dual read-out, Single in-Line Memory Module
Utilizes nine 8M
脳
8 -DRAMs and four BiCMOS 8-bit buffers/line drivers VT244A
Two versions: HYM 72V8010GS with SOJ-components ( 9 mm module thickness)
HYM 72V8000GS with TSOPII-components ( 4 mm module thickness)
4048 refresh cycles / 64 ms with 12 / 11 addressing
Gold contact pad
double sided module with 25.35 mm (1000 mil) height
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Semiconductor Group
1
115.95
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