based on 32Mx8 SDRAM with LVTTL, 4 banks & 8K Refresh
HYM72V32656H(L)T8 Series
DESCRIPTION
The HYM72V32656H(L)T8 Series are 32Mx64bits Synchronous DRAM Modules. The modules are composed of eight 32Mx8bits
CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TSSOP package on a 168pin glass-epoxy
printed circuit board. One 0.22uF and one 0.0022uF decoupling capacitors per each SDRAM are mounted on the PCB.
The HYM72V32656H(L)T8 Series are Dual In-line Memory Modules suitable for easy interchange and addition of 256Mbytes mem-
ory. The HYM72V32656H(L)T8 Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and out-
puts are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.
FEATURES
鈥?1.15 (29.21mm) PCB Height
鈥?168-Pin Unbuffered DIMM with Single Sided
鈥?One 0.33碌F and one 0.1碌F decoupling capacitors
adopted
鈥?Serial Presence Detect with Serial EEPROM
鈥?Meets all the other JEDEC specifications
鈥?Single 3.3V鹵0.3V power supply
鈥?All device pins are LVTTL compatible
鈥?8192 refresh cycles every 64ms
鈥?Fully synchronous ; all inputs referenced to posi-
tive edge of system clock
鈥?Dual or Quad internal banks with single pulsed
/RAS
鈥?Auto precharge/precharge all banks by A
10
flag
鈥?Possible to assert random column address every
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clock cycle
Interleaved auto refresh mode
Programmable burst lengths and sequences
- 1,2,4,8,full page for Sequential type
- 1,2,4,8 for Interleave type
Programmable /CAS latency ; 2,3 clocks
Support clock suspend/power down mode by
CKE0
Data mask function by DQM
Mode register set programming
Burst termination command
Self refresh provides minimum power, full internal
refresh control
ORDERING INFORMATION
Part No.
HYM72V32656HT8-P
HYM72V32656HT8-S
HYM72V32656HLT8-P
HYM72V32656HLT8-S
Clock
Frequency
100MHz
100MHz
100MHz
100MHz
Internal
Bank
Ref.
Power
Normal
SDRAM
Package
Plating
4 Banks
8K
Low Power
TSOP-II
Gold
This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not assume any responsibility for
use of circuits described. No patent licenses are implied.
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