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HYM5V64404ASLTQG-50 Datasheet

  • HYM5V64404ASLTQG-50

  • x64 EDO Page Mode DRAM Module

  • 199.23KB

  • 11頁(yè)

  • ETC

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HYM5V64404A Q-Series
SO DIMM 4Mx64 bit CMOS DRAM MODULE
based on 4Mx16 DRAM, EDO, 3.3V, 4K/8K-Refresh
DESCRIPTION
The HYM5V64404A Q-Series is a 4Mx64-bit EDO mode CMOS DRAM module consisting of four 4Mx16
TSOP and one 2048-bit EEPROM on a 144 pin glass-epoxy printed circuit board. 0.1碌F and 0.01碌F
decoupling capacitors are mounted for each DRAM. The HYM5V64404AQ G-series is gold plated socket
type Dual In-line Memory Module suitable for easy interchange and addition of 32M byte memory.
FEATURES
鈥?/div>
Max. Active Power Dissipation
Speed
50
60
8K
1.58W
1.30W
4K
2.02W
1.73W
鈥?/div>
Single power supply of 3.3V
鹵
10%
鈥?/div>
Read-Modify-Write Capability
鈥?/div>
LVTTL compatible inputs and outputs
鈥?/div>
/CAS-before-/RAS, /RAS-only, Hidden
and Self refresh capability
鈥?/div>
Refresh cycles
tHPC
25ns
30ns
Part No.
HYM5V64404A Q-Series
HYM5V64434A Q-Series
Ref.
4K
8K攏
陋
鈥?/div>
Fast access time and cycle time
Speed
50
60
tRAC
50ns
60ns
tCAC
13ns
15ns
鈥?/div>
144-Pin SO DIMM
鈥?/div>
Serial Presence Detect with EEPROM
鈥?/div>
Extended Data Out Operation
攏 陋
/CAS-before-/RAS refresh, Hidden refresh
mode : 4K cycles / 64ms
PIN DISCRIPTION
/RAS0
/CAS0-CAS7,
/WE
/OE
A0 -A12
A0 -A11
DQ0-DQ63
SCL
SDA
VCC
VSS
Row Address Strobe
Column Address Strobe
Write Enable
Output Enable
Address Input(8K Product)
Address Input(4K Product)
Data Input / Output
Serial PD Clock Input
Serial PD Data Input/Output
Power (+3.3V)
Ground
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume
any responsibility for use of circuits described. No patent licenses are implied.
Rev.04 / May.98
漏1998
Hyundai Semiconductor

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