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HYM361120S-70 Datasheet

  • HYM361120S-70

  • 1M x 36-Bit Dynamic RAM Module (2M x 18-Bit Dynamic RAM Modu...

  • 138.93KB

  • 9頁(yè)

  • INFINEON   INFINEON

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1M
脳
36-Bit Dynamic RAM Module
(2M
脳
18-Bit Dynamic RAM Module)
HYM 361120/40S/GS-60/-70
Advanced Information
鈥?/div>
1 048 576 words by 36-bit organization
(alternative 2 097 152 words by 18-bit)
Fast access and cycle time
60 ns access time
110 ns cycle time (-60 version)
70 ns access time
130 ns cycle time (-70 version)
Fast page mode capability with
40 ns cycle time (-60 version)
45 ns cycle time (-70 version)
Single + 5 V (鹵 10 %) supply
Low power dissipation
max. 6820 mW active (-60 version)
max. 6160 mW active (-70 version)
CMOS 鈥?66 mW standby
TTL
鈥?132 mW standby
CAS-before-RAS refresh, RAS-only-refresh,
Hidden refresh
鈥?/div>
12 decoupling capacitors mounted on
substrate
All inputs, outputs and clock fully TTL
compatible
72 pin Single in-Line Memory Module
Utilizes four 1M
脳
1-DRAMs and eight
1M
脳
4-DRAMs in 300 mil SOJ packages
1024 refresh cycles/16 ms
Tin-Lead contact pads (S - version)
Gold contact pads (GS - version)
HYM 321140S: single sided module with
31.75 mm (1250 mil) height
HYM 321120S: double sided module with
25.40 mm (1000 mil) height
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鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
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Ordering Information
Type
HYM 361140S-60
HYM 361140S-70
HYM 361120S-60
HYM 361120S-70
HYM 361140GS-60
HYM 361140GS-70
HYM 361120GS-60
HYM 361120GS-70
Ordering Code
Q67100-Q959
Q67100-Q958
Q67100-Q942
Q67100-Q741
Q67100-Q1019
Q67100-Q651
Q67100-Q961
Q67100-Q960
Package
L-SIM-72-8
L-SIM-72-8
L-SIM-72-3
L-SIM-72-3
L-SIM-72-8
L-SIM-72-8
L-SIM-72-3
L-SIM-72-3
Descriptions
DRAM module (access time 60 ns)
DRAM module (access time 70 ns)
DRAM module (access time 60 ns)
DRAM module (access time 70 ns)
DRAM module (access time 60 ns)
DRAM module (access time 70 ns)
DRAM module (access time 60 ns)
DRAM module (access time 70 ns)
Semiconductor Group
591
06.94

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