max. 252 mW active (-50 version)
max. 216 mW active (-60 version)
max. 198 mW active (-70 version)
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Standby power dissipation:
7.2 mW max. standby (TTL)
3.6 mW max. standby (CMOS)
720
碌W
max. standby (CMOS) for Low Power Version
Output unlatched at cycle end allows two-dimensional chip selection
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Read, write, read-modify write, CAS-before-RAS refresh, RAS-only refresh,
hidden refresh and test mode capability
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All inputs and outputs TTL-compatible
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1024 refresh cycles / 16 ms
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1024 refresh cycles / 128 ms Low Power Version
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Plastic Packages: P-SOJ-26/20-5 with 300 mil width
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Semiconductor Group
1
4.96
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