HY62UF16101C Series
64Kx16bit full CMOS SRAM
Document Title
64K x16 bit 3.0V Super Low Power Full CMOS Slow SRAM
Revision History
Revision No
03
History
Divide output load into two factors
- tCLZ,tOLZ,tBLZ,tCHZ,tOHZ,tBHZ,tWHZ,tOW
- Others
Add marking information
Add 100ns speed
Draft Date
Dec.10. 2000
Remark
Final
04
Dec.27. 2000
Final
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.04 /Dec. 00
Hynix Semiconductor