音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

HY5V62CF-S Datasheet

  • HY5V62CF-S

  • x32 SDRAM

  • 11頁(yè)

  • ETC

掃碼查看芯片數(shù)據(jù)手冊(cè)

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

HY5V62CF
4 Banks x 512K x 32Bit Synchronous DRAM
DESCRIPTION
The Hynix HY5V62C is a 67,108,864-bit CMOS Synchronous DRAM, ideally suited for the memory applications which
require wide data I/O and high bandwidth. HY5V62C is organized as 4banks of 524,288x32.
HY5V62C is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are
synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high band-
width. All input and output voltage levels are compatible with LVTTL.
Programmable options include the length of pipeline (Read latency of 2 or 3), the number of consecutive read or write
cycles initiated by a single control command (Burst length of 1,2,4,8 or full page), and the burst count
sequence(sequential or interleave). A burst of read or write cycles in progress can be terminated by a burst terminate
command or can be interrupted and replaced by a new burst read or write command on any cycle. (This pipelined
design is not restricted by a `2N` rule.)
FEATURES
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
JEDEC standard 3.3V power supply
All device pins are compatible with LVTTL interface
90Ball FBGA with 0.8mm of pin pitch
All inputs and outputs referenced to positive edge of
system clock
Data mask function by DQM0,1,2 and 3
鈥?/div>
鈥?/div>
Internal four banks operation
鈥?/div>
Burst Read Single Write operation
Programmable CAS Latency ; 2, 3 Clocks
鈥?/div>
鈥?/div>
鈥?/div>
Auto refresh and self refresh
4096 refresh cycles / 64ms
Programmable Burst Length and Burst Type
- 1, 2, 4, 8 or full page for Sequential Burst
- 1, 2, 4 or 8 for Interleave Burst
鈥?/div>
ORDERING INFORMATION
Part No.
HY5V62CF-7
HY5V62CF-S
Clock Frequency
143MHz
Power
Normal
Organization
4Banks x 512Kbits
x32
Interface
LVTTL
Package
90Ball FBGA
100MHz
This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not assume
any responsibility for use of circuits described. No patent licenses are implied.
Rev. 0.4/Nov. 01

HY5V62CF-S相關(guān)型號(hào)PDF文件下載

掃碼下載APP,
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù):
賣家服務(wù):
技術(shù)客服:

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào),
第一時(shí)間獲取資訊。

建議反饋

聯(lián)系人:

聯(lián)系方式:

按住滑塊,拖拽到最右邊
>>
感謝您向阿庫(kù)提出的寶貴意見,您的參與是維庫(kù)提升服務(wù)的動(dòng)力!意見一經(jīng)采納,將有感恩紅包奉上哦!