HY514404A
1Mx4, Extended Data Out mode
DESCRIPTION
This family is a 4M bit dynamic RAM organized 1,048,576 x 4-bit configuration with Extended Data Out mode CMOS
DRAMs. Extended data out mode is a kind of page mode which is useful for the read operation. The circuit and process
design allow this device to achieve high performance and low power dissipation. Optional features are access time(50, 60
or 70ns) and package type(SOJ, TSOP-II) and power consumption (Normal or Low power with self refresh). Hyundai鈥檚
advanced circuit design and process technology allow this device to achieve high bandwidth, low power consumption and
high reliability.
FEATURES
鷗
Extended data out operation
鷗
Read-modify-write Capability
鷗
TTL compatible inputs and outputs
鷗
/CAS-before-/RAS, /RAS-only, Hidden and
Self refresh capability
鷗
Max. Active power dissipation
Speed
50
60
70
鷗
Refresh cycle
Part number
HY514404A
Refresh
1K
Normal
16ms
SL-part
128ms
Power
605mW
495mW
412mW
鷗
JEDEC standard pinout
鷗
20/26-pin SOJ (300mil)
20/26-pin TSOP-II (300mil)
鷗
Single power supply of 5V
鹵
10%
鷗
Early Write or output enable controlled write
鷗
Fast access time and cycle time
Speed
50
60
70
tRAC
50ns
60ns
70ns
tCAC
13ns
15ns
20ns
tHPC
20ns
25ns
30ns
ORDERING INFORMATION
Part Name
HY514404AJ
HY514404ALJ
HY514404AT
HY514404ALT
*SL : Low power with self refresh
Refresh
1K
1K
1K
1K
Power
Package
20/26Pin SOJ
L-part
20/26Pin SOJ
20/26Pin TSOP-II
L-part
20/26Pin TSOP-II
This document is a general product description and is subject to change without notice. Hyundai electronics does not assume any responsibility for use of
circuits described. No patent licences are implied
Hyundai Semiconductor
Rev.10 / Jan.97
1
Powered by ICminer.com Electronic-Library Service CopyRight 2003
1
2
3
4
5
6
7
8
