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HX6228ABNT Datasheet

  • HX6228ABNT

  • 128K x 8 STATIC RAM-SOI HX6228

  • 153.21KB

  • 12頁

  • HONEYWELL

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Military & Space Products
128K x 8 STATIC RAM鈥擲OI
FEATURES
RADIATION
鈥?Fabricated with RICMOS鈩?IV Silicon on Insulator (SOI)
0.7
碌m
Process (L
eff
= 0.55
碌m)
鈥?Total Dose Hardness through 1x10
6
rad(SiO
2
)
鈥?Neutron Hardness through 1x10
14
cm
-2
鈥?Asynchronous Operation
鈥?Dynamic and Static Transient Upset Hardness
through 1x10
11
rad (Si)/s
鈥?Dose Rate Survivability through <1x10
12
rad(Si)/s
鈥?Soft Error Rate of <1x10
-10
upsets/bit-day in
Geosynchronous Orbit
鈥?No Latchup
鈥?CMOS or TTL Compatible I/O
鈥?Single 5 V
鹵
10% Power Supply
OTHER
鈥?Read/Write Cycle Times
鈮?/div>
16 ns (Typical)
鈮?/div>
25 ns (-55 to 125擄C)
鈥?Typical Operating Power <25 mW/MHz
HX6228
鈥?Packaging Options
- 32-Lead Flat Pack (0.820 in. x 0.600 in.)
- 40-Lead Flat Pack (0.775 in. x 0.710 in.)
GENERAL DESCRIPTION
The 128K x 8 Radiation Hardened Static RAM is a high
performance 131,072 word x 8-bit static random access
memory with industry-standard functionality. It is fabricated
with Honeywell鈥檚 radiation hardened technology, and is
designed for use in systems operating in radiation environ-
ments. The RAM operates over the full military temperature
range and requires only a single 5 V
鹵
10% power supply. The
RAM is wire bond programmable for either TTL or CMOS
compatible I/O. Power consumption is typically less than 25
mW/MHz in operation, and less than 5 mW in the low power
disabled mode. The RAM read operation is fully asynchro-
nous, with an associated typical access time of 15 ns at 5V.
Honeywell鈥檚 enhancedSOI RICMOS鈩V (Radiation Insen-
sitive CMOS) technology is radiation hardened through the
use of advanced and proprietary design, layout and process
hardening techniques. The RICMOS鈩?IV process is an
advanced 5-volt, SIMOX CMOS technology with a 150 脜
gate oxide and a minimum feature size of 0.7
碌m
(0.55
碌m
effective gate length鈥擫
eff
). Additional features include
Honeywell鈥檚 proprietary SHARP planarization process, and
a lightly doped drain (LDD) structure for improved short
channel reliability. A 7 transistor (7T) memory cell is used for
superior single event upset hardening, while three layer
metal power bussing and the low collection volume SIMOX
substrate provide improved dose rate hardening.

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