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HSP50214BVI Datasheet

  • HSP50214BVI

  • Programmable Downconverter

  • 60頁

  • INTERSIL   INTERSIL

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HSP50214B
TM
Data Sheet
May 2000
File Number
4450.3
Programmable Downconverter
[ /Title
(HSP5
0214B)
/Sub-
ject
(Pro-
gram-
mable
Down-
con-
verter)
/Autho
r ()
/Key-
words
(Inter-
sil
Corpo-
ration,
Down-
con-
verter,
Down
Con-
verter,
Pro-
gram-
mable
Down-
con-
verter,
DSP,
AMPS,
TDMA
, North
Ameri-
can
TDMA
, GSM,
The HSP50214B Programmable Downconverter converts
digitized IF data into 鏗乴tered baseband data which can be
processed by a standard DSP microprocessor. The
Programmable Downconverter (PDC) performs down
conversion, decimation, narrowband low pass 鏗乴tering, gain
scaling, resampling, and Cartesian to Polar coordinate
conversion.
The 14-bit sampled IF input is down converted to baseband
by digital mixers and a quadrature NCO, as shown in the
Block Diagram. A decimating (4 to 32) 鏗乫th order Cascaded
Integrator-Comb (CIC) 鏗乴ter can be applied to the data
before it is processed by up to 5 decimate-by-2 halfband
鏗乴ters. The halfband 鏗乴ters are followed by a 255-tap
programmable FIR 鏗乴ter. The output data from the
programmable FIR 鏗乴ter is scaled by a digital AGC before
being re-sampled in a polyphase FIR 鏗乴ter. The output
section can provide seven types of data: Cartesian (I, Q),
polar (R,
胃),
鏗乴tered frequency (d胃/dt), Timing Error (TE), and
AGC level in either parallel or serial format.
Features
鈥?Up to 65 MSPS Front-End Processing Rates (CLKIN) and
55MHz Back-End Processing Rates (PROCCLK)
Clocks May Be Asynchronous
鈥?Processing Capable of >100dB SFDR
鈥?Up to 255-Tap Programmable FIR
鈥?Overall Decimation Factor Ranging from 4 to 16384
鈥?Output Samples Rates to
鈮?2.94
MSPS with Output
Bandwidths to
鈮?/div>
982kHz Lowpass
鈥?32-Bit Programmable NCO for Channel Selection and
Carrier Tracking
鈥?Digital Resampling Filter for Symbol Tracking Loops and
Incommensurate Sample-to-Output Clock Ratios
鈥?Digital AGC with Programmable Limits and Slew Rate to
Optimize Output Signal Resolution; Fixed or Auto Gain
Adjust
鈥?Serial, Parallel, and FIFO 16-Bit Output Modes
鈥?Cartesian to Polar Converter and Frequency Discriminator
for AFC Loops and Demodulation of AM, FM, FSK, and
DPSK
鈥?Input Level Detector for External I.F. AGC Support
Ordering Information
PART
NUMBER
HSP50214BVC
HSP50214BVI
TEMP.
RANGE (
o
C)
0 to 70
-40 to 85
PACKAGE
120 Ld MQFP
120 Ld MQFP
PKG. NO.
Applications
鈥?Single Channel Digital Software Radio Receivers
Q120.28x28
Q120.28x28
鈥?Base Station Rx鈥檚: AMPS, NA TDMA, GSM, and CDMA
鈥?Compatible with HSP50210 Digital Costas Loop for PSK
Reception
鈥?Evaluation Platform Available
Block Diagram
MICROPROCESSOR
READ/WRITE
C(7:0)
LEVEL DETECT
HALFBAND
FILTERS
5
TH
ORDER
CIC
FILTER
5
TH
ORDER
CIC
FILTER
CARRIER
NCO
RESAMPLING
NCO
DISCRIMINATOR
FREQ
255-TAP
FIR FILTER
I OUT
POLYPHASE
FIR AND
HALFBAND
FILTERS
POLYPHASE
FIR AND
HALFBAND
FILTERS
SEROUTA
OUTPUT FORMATTER
CARTESIAN
TO
POLAR
COORDINATE
CONVERTER
Q OUT
MAG.
SEROUTB
AOUT(15:0)
BOUT(15:0)
CONTROL
AGC LOOP FILTER
AGC
IN(13:0)
GAIN
ADJ
(2:0)
COF
SOF
CLKIN
PROCCLK
REFCLK
INPUT
SECTION
HALFBAND
FILTERS
255-TAP
FIR FILTER
PHASE
TIMING ERROR
鈭?/div>
3-1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil and Design is a trademark of Intersil Corporation.
|
Copyright
漏
Intersil Corporation 2000

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