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HSP43881JC-30 Datasheet

  • HSP43881JC-30

  • Digital Filter

  • 21頁(yè)

  • INTERSIL   INTERSIL

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HSP43881
Data Sheet
May 1999
File Number
2758.4
Digital Filter
The HSP43881 is a video speed Digital Filter (DF) designed
to ef鏗乧iently implement vector operations such as FIR digital
鏗乴ters. It is comprised of eight 鏗乴ter cells cascaded internally
and a shift and add output stage, all in a single integrated
circuit. Each 鏗乴ter cell contains a 8 x 8-bit multiplier, three
decimation registers and a 26-bit accumulator. The output
stage contains an additional 26-bit accumulator which can
add the contents of any 鏗乴ter cell accumulator to the output
stage accumulator shifted right by 8 bits. The HSP43881 has
a maximum sample rate of 30MHz. The effective multiply
accumulate (mac) rate is 240MHz.
The HSP43881 DF can be con鏗乬ured to process expanded
coef鏗乧ient and word sizes. Multiple DFs can be cascaded for
larger 鏗乴ter lengths without degrading the sample rate or a
single DF can process larger 鏗乴ter lengths at less than
30MHz with multiple passes. The architecture permits
processing 鏗乴ter lengths of over 1000 taps with the
guarantee of no over鏗俹ws. In practice, most 鏗乴ter coef鏗乧ients
are less than 1.0, making even larger 鏗乴ter lengths possible.
The DF provides for 8-bit unsigned or two鈥檚 complement
arithmetic, independently selectable for coef鏗乧ients and
signal data.
Each DF 鏗乴ter cell contains three resampling or decimation
registers which permit output sample rate reduction at rates
of
1
/
2
,
1
/
3
or
1
/
4
the input sample rate. These registers also
provide the capability to perform 2-D operations such as
matrix multiplication and N x N spatial
correlations/convolutions for image processing applications.
Features
鈥?Eight Filter Cells
鈥?0MHz to 30MHz Sample Rate
鈥?8-Bit Coef鏗乧ients and Signal Data
鈥?26-Bit Accumulator Per Stage
鈥?Filter Lengths Over 1000 Taps
鈥?Expandable Coef鏗乧ient Size, Data Size and Filter Length
鈥?Decimation by 2, 3 or 4
Applications
鈥?1-D and 2-D FIR Filters
鈥?Radar/Sonar
鈥?Adaptive Filters
鈥?Echo Cancellation
鈥?Complex Multiply-Add
鈥?Sample Rate Converters
Ordering Information
PART
NUMBER
HSP43881JC-20
HSP43881JC-25
HSP43881JC-30
HSP43881GC-20
HSP43881GC-25
HSP43881GC-30
TEMP. RANGE
(
o
C)
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
PACKAGE
84 Ld PLCC
84 Ld PLCC
84 Ld PLCC
85 Ld PGA
85 Ld PGA
85 Ld PGA
PKG. NO.
N84.1.15
N84.1.15
N84.1.15
G85.A
G85.A
G85.A
Block Diagram
V
CC
DIENB
CIENB
DCMO - 1
ERASE
TCCI
CIN0 - 7
RESET
CLK
ADR0 - 2
RESET
CLK
SHADD
SENBL
SENBH
8
5
V
SS
DIN0 - DIN7 TCS
8
5
8
DF
FILTER
CELL 0
5
3
MUX
ADR0, ADR1, ADR2
2
26
OUTPUT
STAGE
2
SUM0 - 25
26
26
8
8
DF
FILTER
CELL 1
26
8
8
DF
FILTER
CELL 2
26
8
8
DF
FILTER
CELL 3
26
8
8
DF
FILTER
CELL 4
26
8
8
DF
FILTER
CELL 5
26
8
8
DF
FILTER
CELL 6
26
8
8
DF
FILTER
CELL 7
26
TCCO
8
COUT0 - 7
COENB
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright 漏 Intersil Corporation 1999

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