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HSP43124SI-40 Datasheet

  • HSP43124SI-40

  • Serial I/O Filter

  • 147.41KB

  • 17頁

  • INTERSIL   INTERSIL

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HSP43124
Data Sheet
May 1999
File Number
3555.6
Serial I/O Filter
The Serial I/O Filter is a high performance 鏗乴ter engine that is
ideal for off loading the burden of 鏗乴ter processing from a
DSP microprocessor. It supports a variety of multistage 鏗乴ter
con鏗乬urations based on a user programmable 鏗乴ter and 鏗亁ed
coef鏗乧ient halfband 鏗乴ters. These con鏗乬urations include a
programmable FIR 鏗乴ter of up to 256 taps, a cascade of from
one to 鏗乿e halfband 鏗乴ters, or a cascade of halfband 鏗乴ters
followed by a programmable FIR. The half band 鏗乴ters each
decimate by a factor of two, and the FIR 鏗乴ter decimates from
one to eight. When all six 鏗乴ters are selected, a maximum
decimation of 256 is provided.
For digital tuning applications, a separate multiplier is
provided which allows the incoming data stream to be
multiplied, or mixed, by a user supplied mix factor. A two pin
interface is provided for serially loading the mix factor from
an external source or selecting the mix factor from an on-
board ROM. The on-board ROM contains samples of a
sinusoid capable of spectrally shifting the input data by one
quarter of the sample rate, F
S
/4. This allows the chip to
function as a digital down converter when the 鏗乴ter stages
are con鏗乬ured as a low-pass 鏗乴ter.
The serial interface for3- input and output data is compatible
with the serial ports of common DSP microprocessors.
Coef鏗乧ients and con鏗乬uration data are loaded over a
bidirectional eight bit interface.
Features
鈥?45MHz Clock Rate
鈥?256 Tap Programmable FIR Filter
鈥?24-Bit Data, 32-Bit Coef鏗乧ients
鈥?Cascade of up to 5 Half Band Filters
鈥?Decimation from 1 to 256
鈥?Two Pin Interface for Down Conversion by F
S
/4
鈥?Multiplier for Mixing or Scaling Input with an External
Source
鈥?Serial I/O Compatible with Most DSP Microprocessors
Applications
鈥?Low Cost FIR Filter
鈥?Filter Co-Processor
鈥?Digital Tuner
Ordering Information
PART NUMBER
HSP43124PC-45
HSP43124PC-33
HSP43124SC-45
HSP43124SC-33
HSP43124SI-40
TEMP.
RANGE (
o
C)
0 to 70
0 to 70
0 to 70
0 to 70
-40 to 85
PACKAGE
28 Ld PDIP
28 Ld PDIP
28 Ld SOIC
28 Ld SOIC
28 Ld SOIC
PKG.
NO.
E28.6
E28.6
M28.3
M28.3
M28.3
Block Diagram
INPUT
FORMATTER
OUTPUT
FORMATTER
DIN
SCLK
SYNCIN
MXIN
SYNCMX
HALF
BAND
FILTER
#1
HALF
BAND
FILTER
#2
HALF
BAND
FILTER
#5
PROGRAMMABLE
FIR
FILTER
DOUT
SYNCOUT
CLKOUT
CONTROL
INTERFACE
A0-2
C0-7
WR
RD
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
漏
Intersil Corporation 1999
FSYNC
FCLK

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