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HRF-AT4611-TR Datasheet

  • HRF-AT4611-TR

  • 31.5 dB, DC-4GHz, 6 Bit Serial Digital Attenuator

  • 121.14KB

  • 8頁(yè)

  • HONEYWELL

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HRF-AT4611
Preliminary
31.5 dB, DC-4GHz, 6 Bit
Serial Digital Attenuator
Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Very Low DC Power Consumption
Attenuation In Steps From 0.5 dB To 31.5 dB
Single Or Dual Power Supply Voltages
Serial Data Interface
50 Ohm Compatible Impedance
TM
Space Saving LPCC Surface Mount Packaging
Product Description
The Honeywell HRF-AT4611 is a 6-bit digital
attenuator that is ideal for use in broadband
communication system applications that require
accuracy, speed and low power consumption. The
HRF-AT4611 is manufactured with Honeywell's
patented Silicon On Insulator (SOI) CMOS
manufacturing
technology, which provides the
performance of GaAs with the economy and
integration capabilities of conventional CMOS
HRF-AT4611 in LPCC鈩?Package
RF Electrical Specifications @ + 25
o
C
Results @ Vdd = 5.0 +/- 10%, Vss = 0 unless otherwise stated, Z0 = 50 Ohms
Parameter
Test Condition
Frequency
Minimum
Insertion Loss
DC 鈥?0.5 GHz
2.0 GHz
3.0 GHz
4.0 GHz
DC 鈥?2.0 GHz
DC 鈥?2.0 GHz
Typical
2.1
2.9
--
--
24
29
Maximum
Units
dB
dB
dB
dB
dBm
dBm
1dB Compression
1dB Compression
Input IP3
VSS = 0V, Input Power
VSS = - VDD, Input Power
VSS = 0V Two-tone inputs
DC 鈥?2.0 GHz
38
dBm
Up To +5 dB @ 0 dB
Attenuation
Input IP3
V
ss
= - V
DD
DC 鈥?2.0 GHz
>38
dBm
Two-tone inputs Up To + 5
dBm @ 0 dBm Attenuation
Return Loss*
Any Bit or Combination
DC - 4.0 GHz
11
dB
dB
+/-(0.3 + 3% of programmed IL)
DC 鈥?1.0 GHz
Attenuation Accuracy
All attenuation states
dB
+/-(0.3 + 3% of programmed IL)
2.0 GHz
All attenuation states
dB
+/-(0.4 + 4% of programmed IL)
3.0 GHz
All attenuation states
dB
+/-(0.5 + 6% of programmed IL)
4.0 GHz
All attenuation states
Trise, Tfall*
10% To 90%
10
nS
Ton, Toff (Tpd)
50% Cntl To 90%/10%RF
15
nS
Transients
In-Band
30
mV
T clock Period (Tprd)*
T high / T low = 錕?frac12; minimum clock period
50
nS
T data set up (Tsup)*
Set up to rising edge of clock
5
nS
T data hold (Thld)*
Data hold after rising edge of clock
2
nS
T latch set up (Tlsup*)
Data set up to falling edge of OE
5
nS
0.01uF Decoupling Capacitors Required On Power Supply Rails.
*By design
________________________________________________________________________________________________________
Web Site:
www.mysoiservices.com
Honeywell
Email:
mysoiservices@honeywell.com
Solid State Electronics Center
12001 State Highway 55
2002 4611W
Published June 2002 Page 1
Plymouth, Minnesota 55441-4799
1-800-323-8295

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