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HM62W8512BI Datasheet

  • HM62W8512BI

  • 4 M SRAM (512-kword x 8-bit)

  • 14頁(yè)

  • HITACHI

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HM62W8512BI Series
4 M SRAM (512-kword
脳
8-bit)
ADE-203-1086A (Z)
Rev. 1.0
Jul. 13, 1999
Description
The Hitachi HM62W8512BI is a 4-Mbit static RAM organized 512-kword
脳
8-bit. HM62W8512BI Series
has realized higher density, higher performance and low power consumption by employing Hi-CMOS process
technology. The HM62W8512BI Series offers low power standby power dissipation; therefore, it is suitable
for battery backup systems. It is packaged in standard 32-pin TSOP II.
Features
鈥?/div>
Single 3.3 V supply: 3.3 V
鹵
0.3V
鈥?/div>
Access time: 70/85 ns (max)
鈥?/div>
Power dissipation
錚?/div>
Active: 16.5 mW/MHz (typ)
錚?/div>
Standby: 3.3
碌W
(typ)
Completely static memory. No clock or timing strobe required
Equal access and cycle times
Common data input and output: Three state output
Directly LV-TTL compatible: All inputs and outputs
Battery backup operation
Operating temperature: 鈥?0 to +85藲C
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Ordering Information
Type No.
HM62W8512BLTTI-7
HM62W8512BLTTI-8
Access time
70 ns
85 ns
Package
400-mil 32-pin plastic TSOP II (TTP-32D)

HM62W8512BI相關(guān)型號(hào)PDF文件下載

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