HM62W16255HC Series
4M High Speed SRAM (256-kword
脳
16-bit)
ADE-203-1200 (Z)
Preliminary
Rev. 0.0
Sep. 1, 2000
Description
The HM62W16255HC is a 4-Mbit high speed static RAM organized 256-kword
脳
16-bit. It has realized high
speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing
technology. It is most appropriate for the application which requires high speed, high density memory and
wide bit width configuration, such as cache and buffer memory in system. The HM62W16255HC is
packaged in 400-mil 44-pin SOJ and 400-mil 44-pin plastic TSOPII for high density surface mounting.
Features
鈥?/div>
Single 3.3 V supply: 3.3 V
鹵
0.3 V
鈥?/div>
Access time: 10 ns (max)
鈥?/div>
Completely static memory
錚?/div>
No clock or timing strobe required
鈥?/div>
Equal access and cycle times
鈥?/div>
Directly TTL compatible
錚?/div>
All inputs and outputs
鈥?/div>
Operating current: 145 mA (max)
鈥?/div>
TTL standby current: 40 mA (max)
鈥?/div>
CMOS standby current: 5 mA (max)
: 1 mA (max) (L-version)
鈥?/div>
Data retention current: 0.6 mA (max) (L-version)
鈥?/div>
Data retention voltage: 2.0 V (min) (L-version)
鈥?/div>
Center V
CC
and V
SS
type pinout
Preliminary: The specification of this device are subject to change without notice. Please contact your nearest
Hitachi鈥檚 Sales Dept. regarding specification.
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HM62W16255HCLJP-10相關(guān)型號(hào)PDF文件下載
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