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Power supply: 3.3 V +10%, 鈥?%
Clock frequency: 200 MHz to 250 MHz
Internal self-timed late write
Byte write control (2 byte write selects, one for each 9-bit)
Optional
脳36
configuration
HSTL compatible I/O
Programmable impedance output drivers
User selective input trip-point
Differential, HSTL clock inputs
Asynchronous
G
output control
Asynchronous sleep mode
Limited set of boundary scan JTAG IEEE 1149.1 compatible
Protocol: Single clock register-register mode
Preliminary: The specifications of this device are subject to change without notice. Please contact your
nearest Hitachi鈥檚 Sales Dept. regarding specifications.