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HM-6642/883
Data Sheet
March 2004
FN3013.2
512 x 8 CMOS PROM
The HM-6642/883 is a 512 x 8 CMOS NiCr fusible link
Programmable Read Only Memory in the popular 24 pin,
byte wide pinout. Synchronous circuit design techniques
combine with CMOS processing to give this device high
speed performance with very low power dissipation.
On-chip address latches are provided, allowing easy
interfacing with recent generation microprocessors that use
multiplexed address/data bus structures, such as the 8085.
The output enable controls, both active low and active high,
further simplify microprocessor system interfacing by
allowing output data bus control independent of the chip
enable control. The data output latches allow the use of the
HM-6642/883 in high speed pipelined architecture systems,
and also in synchronous logic replacement functions.
Applications for the HM-6642/883 CMOS PROM include low
power hand held microprocessor based instrumentation and
communications systems, remote data acquisition and
processing systems, processor control store, and
synchronous logic replacement.
All bits are manufactured storing a logical 鈥?鈥?and can be
selectively programmed for a logical 鈥?鈥?at any bit location.
Features
鈥?This Circuit is Processed in Accordance to MIL-STD-883
and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
鈥?Low Power Standby and Operating Power
- ICCSB. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100碌A
- ICCOP . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA at 1MHz
鈥?Fast Access Time. . . . . . . . . . . . . . . . . . . . . . . 120/200ns
鈥?Wide Operating . . . . . . . . . . . . . . . . . . . . -55擄C to +125擄C
鈥?Temperature Range
鈥?Industry Standard Pinout
鈥?Single 5.0V Supply
鈥?CMOS/TTL Compatible Inputs
鈥?Field Programmable
鈥?Synchronous Operation
鈥?On-Chip Address Latches
鈥?Separate Output Enable
Pin Description
PIN
NC
No Connect
Address Inputs
Chip Enable
Data Output
Power (+5V)
Output Enable
Program Enable
P should be hardwired to GND except during programming.
HM-6642/883 (CLCC)
TOP VIEW
V
CC
NC
A5
A6
A7
G1
26
25
24
23
22
21
20
19
12
Q1
13
Q2
14
GND
15
NC
16
Q3
17
Q4
18
Q5
G2
G3
E
P
NC
Q7
Q6
A8
27
DESCRIPTION
Ordering Information
PKG.
SBDIP
SLIM
SBDIP
CLCC
TEMP.
RANGE (擄C)
120ns
200ns
PKG.
DWG. #
A0-A8
E
Q
V
CC
G1, G2, G3
-55 to +125 HM1-6642B/883 HM1-6642/883 D24.6
-55 to +125 HM6-6642B/883 HM6-6642/883 D24.3
-55 to +125
-
HM4-6642/883 J28.A
P (Note)
NOTE:
Pinouts
M-6642/883 (SBDIP)
TOP VIEW
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
GND
1
2
3
4
5
6
7
8
9
10
11
12
24 V
CC
23 A8
22 G1
21 G2
20 G3
19 E
18 P
17 Q7
16 Q6
15 Q5
14 Q4
13 Q3
A4
A3
A2
A1
A0
NC
Q0
5
6
7
8
9
10
11
4
3
2
1
28
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
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Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright 漏 Intersil Americas Inc. 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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