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HM-6516/883 Datasheet

  • HM-6516/883

  • 2K x 8 CMOS RAM

  • 8頁

  • INTERSIL   INTERSIL

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TM
HM-6516/883
2K x 8 CMOS RAM
Description
The HM-6516/883 is a CMOS 2048 x 8 Static Random
Access Memory. Extremely low power operation is achieved
by the use of complementary MOS design techniques. This
low power is further enhanced by the use of synchronous cir-
cuit techniques that keep the active (operating) power low,
which also gives fast access times. The pinout of the HM-
6516/883 is the popular 24 pin, 8-bit wide JEDEC Standard
which allows easy memory board layouts, flexible enough to
accommodate a variety of PROMs, RAMS, EPROMs, and
ROMs.
The HM-6516/883 is ideally suited for use in microprocessor
based systems. The byte wide organization simplifies the
memory array design, and keeps operating power down to a
minimum because only one device is enabled at a time. The
address latches allow very simple interfacing to recent gen-
eration microprocessors which employ a multiplexed
address/data bus. The convenient output enable control also
simplifies multiplexed bus interfacing by allowing the data
outputs to be controlled independent of the chip enable.
March 1997
Features
鈥?This Circuit is Processed in Accordance to MIL-STD-
883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
鈥?Low Power Standby. . . . . . . . . . . . . . . . . . . 275碌W Max
鈥?Low Power Operation . . . . . . . . . . . . . .55mW/MHz Max
鈥?Fast Access Time . . . . . . . . . . . . . . . . . 120/200ns Max
鈥?Industry Standard Pinout
鈥?Single Supply . . . . . . . . . . . . . . . . . . . . . . . . . . 5.0V VCC
鈥?TTL Compatible
鈥?Static Memory Cells
鈥?High Output Drive
鈥?On-Chip Address Latches
鈥?Easy Microprocessor Interfacing
Ordering Information
120ns
HM1-6516B/883
HM4-6516B/883
200ns
HM1-6516/883
-
TEMPERATURE RANGE PACKAGE
-55
o
C to 125
o
C
-55
o
C to +125
o
C
CERDIP
CLCC
PKG. NO.
F24.6
J32.A
Pinouts
HM-6516/883
(CERDIP)
TOP VIEW
NC
A7
HM-6516/883
(CLCC)
TOP VIEW
VCC
NC
NC
NC
NC
PIN
NC
29 A8
28 A9
27 NC
26 W
25 G
24 A10
23 E
22 DQ7
21 DQ6
DESCRIPTION
No Connect
Address Inputs
Chip Enable/Power Down
Ground
A7 1
A6 2
A5 3
A4 4
A3 5
A2 6
A1 7
A0 8
DQ0 9
DQ1 10
DQ2 11
GND 12
24 VCC
23 A8
22 A9
21 W
20 G
19 A10
18 E
17 DQ7
16 DQ6
15 DQ5
14 DQ4
13 DQ3
4
A6 5
A5 6
A4 7
A3 8
A2 9
A1 10
A0 11
NC 12
DQ0 13
3
2
1
32 31 30
A0 - A10
E
VSS/GND
DQ0 - DQ7 Data In/Data Out
VCC
W
G
Power (+5V)
Write Enable
Output Enable
14 15 16 17 18 19 20
DQ1
DQ2
DQ3
DQ4
GND
DQ5
NC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright 漏 Intersil Americas Inc. 2002. All Rights Reserved
FN2999.1
173

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