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HD74LV4040ARP Datasheet

  • HD74LV4040ARP

  • COUNTER|UP|12-BIT BINARY|LV-CMOS|SOP|16PIN|PLASTIC

  • 17頁

  • ETC

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HD74LV4040A
12-stage Binary Counter
ADE-205-282 (Z)
1st Edition
April 1999
Description
The HD74LV4040A is a 12 stage counter. This device is incremented on the falling edge (negative
transition) of the input clock, and all its output is reset to a low level by applying a logical high on its reset
input. Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook
computers), and the low-power consumption extends the battery life.
Features
鈥?/div>
V
CC
= 2.0 V to 5.5 V operation
鈥?/div>
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
鈥?/div>
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
鈥?/div>
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25擄C)
鈥?/div>
Typical V
OH
undershoot > 2.3 V (@V
CC
= 3.3 V, Ta = 25擄C)
鈥?/div>
Output current
鹵6
mA (@V
CC
= 3.0 V to 3.6 V),
鹵12
mA (@V
CC
= 4.5 V to 5.5 V)
Function Table
Inputs
CLK
鈫?/div>
鈫?/div>
X
Note: H:
L:
X:
鈫?
鈫?
CLR
L
L
H
High level
Low level
Immaterial
Low to high transition
High to low transition
Output
Q
n
Remains unchanged
Changed
All outputs low

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