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HD74LV374ARP Datasheet

  • HD74LV374ARP

  • FLIP-FLOP|OCTAL|D TYPE|LV-CMOS|SOP|20PIN|PLASTIC

  • 68.16KB

  • 15頁

  • ETC

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HD74LV374A
Octal Edge-Triggered D-type Flip-Flops with 3-state Outputs
ADE-205-275 (Z)
1st Edition
April 1999
Description
The HD74LV374A has eight edge trigger D type flip flops with three state outputs in a 20 pin package.
Data at the D inputs meeting set up requirements, are transferred to the Q outputs on positive going
transitions of the clock input. When the clock input goes low, data at the D inputs will be retained at the
outputs until clock input returns high again. When a high logic level is applied to the output control input,
all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the
state of the storage elements. Low-voltage and high-speed operation is suitable for the battery-powered
products (e.g., notebook computers), and the low-power consumption extends the battery life.
Features
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鈥?/div>
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V
CC
= 2.0 V to 5.5 V operation
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25擄C)
Typical V
OH
undershoot > 2.3 V (@V
CC
= 3.3 V, Ta = 25擄C)
Output current
鹵8
mA (@V
CC
= 3.0 V to 3.6 V),
鹵16
mA (@V
CC
= 4.5 V to 5.5 V)
Function Table
Inputs
OE
H
L
L
L
Note: H:
L:
X:
Z:
Q
0
:
CLK
X
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D
X
L
H
X
Output Q
Z
L
H
Q
0
High level
Low level
Immaterial
High impedance
Output level before the indicated steady state input conditions were established.

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