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HD74LV245AFPEL Datasheet

  • HD74LV245AFPEL

  • Octal Bus Transceivers with 3-state Outputs

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  • RENESAS

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HD74LV245A
Octal Bus Transceivers with 3-state Outputs
REJ03D0329鈥?300Z
(Previous ADE-205-247A (Z))
Rev.3.00
Jun. 24, 2004
Description
The HD74LV245A has eight buffers with three-state outputs in a 20-pin package. When DIR is high, data is
transferred from the A inputs to the B outputs, and when DIR is low, data is transferred from the B inputs to the A
outputs. The A and B buses are separated by making the enable input (OE) high level. Low-voltage operation is
suitable for battery-powered products (e.g., notebook computers), and the low power consumption extends the battery
life.
Features
鈥?/div>
V
CC
= 2.0 V to 5.5 V operation
鈥?/div>
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
鈥?/div>
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
鈥?/div>
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25擄C)
鈥?/div>
Typical V
OH
undershoot > 2.3 V (@V
CC
= 3.3 V, Ta = 25擄C)
鈥?/div>
Output current 鹵8 mA (@V
CC
= 3.0 V to 3.6 V), 鹵16 mA (@V
CC
= 4.5 V to 5.5 V)
Ordering Information
Part Name
HD74LV245AFPEL
HD74LV245ARPEL
HD74LV245ATELL
Package Type
SOP鈥?0 pin (JEITA)
SOP鈥?0 pin (JEDEC)
TSSOP鈥?0 pin
Package Code
FP鈥?0DAV
FP鈥?0DBV
TTP鈥?0DAV
Package
Abbreviation
FP
RP
T
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (1,000 pcs/reel)
ELL (2,000 pcs/reel)
Note: Please consult the sales office for the above package availability.
Function Table
Inputs
OE
L
L
H
Note: H: High level
L: Low level
X: Immaterial
DIR
L
H
X
Operation
B data to A bus
A data to B bus
Isolation
Rev.3.00 Jun. 24, 2004 page 1 of 9

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