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HD74LV126ARP Datasheet

  • HD74LV126ARP

  • BUFFER/DRIVER|SINGLE|4-BIT|LV-CMOS|SOP|14PIN|PLASTIC

  • 311.53KB

  • 11頁(yè)

  • ETC

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HD74LV126A
Quad. Bus Buffer Gates with 3-state Outputs
ADE-205-259 (Z)
1st Edition
March 1999
Description
The HD74LV126A features independent line drivers with three state outputs. Each output is disabled when
the associated output enable (OE) input is low. To ensure the high impedance state during power up or power
down, OE should be connected to GND through a pull-down resistor; the minimum value of the resistor is
determined by the current souring capability of the driver. Low-voltage and high-speed operation is suitable
for the battery-powered products (e.g., notebook computers), and the low-power consumption extends the
battery life.
Features
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V
CC
= 2.0 V to 5.5 V operation
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25擄C)
Typical V
OH
undershoot > 2.3 V (@V
CC
= 3.3 V, Ta = 25擄C)
Output current
鹵8
mA (@V
CC
= 3.0 V to 3.6 V),
鹵16
mA (@V
CC
= 4.5 V to 5.5 V)
Function Table
Inputs
OE
H
H
L
A
H
L
X
Output Y
H
L
Z
Note: H:High level
L:Low level
X:Immaterial
Z:High impedance

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