HD74HCT564/HD74HCT574
Octal D-type Flip-Flops (with 3-state outputs)
Description
These devices are positive edge triggered flip-flops. The difference between HD74HCT564 and
HD74HCT574 is only that the former has inverting outputs and the latter has non-inverting outputs.
Data at the D inputs, meeting the set-up and hold time requirements, are transferred to the Q or
Q
outputs
on positive going transitions of the clock (CK) input. When a high logic level is applied to the output
control (OC) input, all outputs go to a high impedance state, regardless of what signals are present at the
other inputs and the state of the storage elements.
Features
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鈥?/div>
鈥?/div>
鈥?/div>
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LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
High Speed Operation: t
pd
(D to Q,
Q)
= 15 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: V
CC
= 4.5 to 5.5 V
Low Input Current: 1 碌A(chǔ) max
Low Quiescent Supply Current: I
CC
(static) = 4 碌A(chǔ) max (Ta = 25擄C)
Function Table
Outputs
Output Control
L
L
L
H
L
X
Clock
Data
H
L
X
X
HD74HCT564
L
H
Q
0
Z
HD74HCT574
H
L
Q
0
Z
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