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HD74HC75FP Datasheet

  • HD74HC75FP

  • LATCH|DUAL|2-BIT|HC-CMOS|SOP|16PIN|PLASTIC

  • 48.44KB

  • 8頁

  • ETC

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HD74HC75
Quad. Bistable Latches
Description
This latch is ideally suited for use as temporary storage for binary information processing, input/output, and
indicator units. Information present at the data (D) input is transferred to the Q output when the latch
enable (LE) is high. The Q output will follow the data input as long as the enable remains high. when the
enable goes low, the information that was present at the data input at the time the transition occurred is
retained at thte Q output unit the enable is permitted to go high again.
Features
鈥?/div>
High Speed Operation: t
pd
(D to Q) = 12.5 ns typ (C
L
= 50 pF)
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1 碌A(chǔ) max
Low Quiescent Supply Current: I
CC
(static) = 2 碌A(chǔ) max (Ta = 25擄C)
Function Table
Inputs
D
L
H
X
Latch Enable
H
H
L
Outputs
Q
L
H
Q
0
Q
H
L
Q
0

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