HD74HC680
12-bit Address Comparator
Description
The HD74HC680 address comparator simplifies addressing of memory boards and/or other peripheral
devices. The four P inputs are normally hard wired with a preprogrammed address. An internal decoder
determines what input information applied to the 12 A inputs must be low or high to cause a low state at the
output (Y). For example, a positive-logic bit combination of 0111 (decimal 7) at the P input determines
that inputs A
1
through A
7
must be low and that inputs A
8
through A
12
must be high to cause the output to go
low. Equality of the address applied at the A inputs to the preprogrammed address is indicated by the
output being low.
The HD74HC680 features a transparent latch and a latch enable input (C). When C is high, the device is in
the transparent mode. When C is low, the previous logical state of Y is latched.
Features
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High Speed Operation
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1 碌A(chǔ) max
Low Quiescent Supply Current: I
CC
(static) = 4 碌A(chǔ) max (Ta = 25擄C)
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