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HD74HC623FP Datasheet

  • HD74HC623FP

  • BUS TRANSCEIVER|SINGLE|8-BIT|HC-CMOS|SOP|20PIN|PLASTIC

  • 60.66KB

  • 10頁

  • ETC

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HD74HC620/HD74HC623
Octal Bus Transceivers (with inverted 3-state outputs)
Octal Bus Transceivers (with 3-state outputs)
Description
This octal bus transceiver is designed for asynchronous two-way communication between data buses. The
control fuction implementation allows for maximum flexibility in timing.
This device allows data transmission from the A bus to the B bus or from the B bus to the A bus depending
upon the logic levels at the enable inputs (GBA and GAB).
The enable inputs can be used to disable the device so that the buses are effectively isolated.
The dual-enable configuration gives these devices the capability to store data by simultaneous enabling of
GBA
and GAB. Each output reinforces its input in this transceiver configuration. Thus, when both control
inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of
bus lines (16 in all) will remain at their last states. The 8-bit codes appearing on the two sets of buses will
be identical for the HD74HC623 or coplementary for the HD74HC620.
Features
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High Speed Operation: t
pd
(Bus to Bus) = 12 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1 碌A max
Low Quiescent Supply Current: I
CC
(static) = 4 碌A max (Ta = 25擄C)
Function Table
Enable Inputs
GBA
L
H
H
L
GAB
L
H
L
H
Operation
HD74HC620
B
data to A bus
A
data to B bus
Isolation
B
data to A bus,
A
data to B bus
HD74HC623
B data to A bus
A data to B bus
Isolation
B data to A bus, A data to B bus

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