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HD74HC4024RP Datasheet

  • HD74HC4024RP

  • COUNTER|UP|7-BIT BINARY|HC-CMOS|SOP|14PIN|PLASTIC

  • 48.35KB

  • 8頁

  • ETC

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HD74HC4024
7-stage Binary Counter
Description
The HD74HC4024 is a 7-stage counter. This device is incremented on the falling edge (negative transition)
of the input clock, and all its output is reset to a low level by applying a logical high on its reset input.
Features
鈥?/div>
High Speed Operation: t
pd
(Clock to Q
1
) = 14 ns typ (C
L
= 50 pF)
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High Output Current: Fanout of 10 LSTTL Loads
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Wide Operating Voltage: V
CC
= 2 to 6 V
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Low Input Current: 1 碌A(chǔ) max
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Low Quiescent Supply Current: I
CC
(static) = 4 碌A(chǔ) max (Ta = 25擄C)
Function Table
Clock
L
L
H
H
Reset
L
H
L
H
L
H
L
H
Outputs State
No change
All outputs are low
No change
All outputs are low
No change
All outputs are low
Advance to next state
All outputs are low

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