HD74HC353
Dual 4-to-1-line Data Selectors/Multiplexers (with 3-state outputs)
Description
Each of these data selectors/multiplexers contains inverters and drivers to supply full binary decoding data
selection to the AND-OR-invert gates. Separate strobe inputs (G) are provided for each of the two four-
line sections.
The three-state outputs can interface with and drive data lines of bus-organized systems. With all but one
of the common output disabled (at a high-impedance state) the low-impedance of the single enable output
will drive the bus line to a high or low logic level. Each output has its own strobe (G). The output is
disabled when its strobe is high.
Features
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High Speed Operation: t
pd
(Data to Y) = 13 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1 碌A(chǔ) max
Low Quiescent Supply Current: I
CC
(static) = 4 碌A(chǔ) max (Ta = 25擄C)
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