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HD74HC108P Datasheet

  • HD74HC108P

  • FLIP-FLOP|DUAL|J/K TYPE|HC-CMOS|DIP|14PIN|PLASTIC

  • 9頁

  • ETC

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HD74HC108
Dual J-K Flip-Flops (with Preset, Common Clear and Common
Clock)
Description
This flip-flop is edge sensitive to the clock input and change state on the negative transition of the clock
pulse. Each flip-flop has independent J, K, and preset inputs and Q and
Q
outputs. Two flip-flops are
controlled by a common clear and a common clock. Preset and clear are independent of the clock and
accomplished by a low logic level on the corresponding input.
Features
鈥?/div>
High Speed Operation: t
pd
(Clock to Q) = 20 ns typ (C
L
= 50 pF)
鈥?/div>
High Output Current: Fanout of 10 LSTTL Loads
鈥?/div>
Wide Operating Voltage: V
CC
= 2 to 6 V
鈥?/div>
Low Input Current: 1 碌A(chǔ) max
鈥?/div>
Low Quiescent Supply Current: I
CC
(static) = 2 碌A(chǔ) max (Ta = 25擄C)

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