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HCTS86HMSR Datasheet

  • HCTS86HMSR

  • Radiation Hardened Quad 2-Input Exclusive OR Gate

  • 9頁(yè)

  • INTERSIL   INTERSIL

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HCTS86MS
October 1995
Radiation Hardened
Quad 2-Input Exclusive OR Gate
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14, LEAD FINISH C
TOP VIEW
A1 1
B1 2
Y1 3
A2 4
B2 5
Y2 6
GND 7
14 VCC
13 B4
12 A4
11 Y4
10 B3
9 A3
8 Y3
Features
鈥?3 Micron Radiation Hardened SOS CMOS
鈥?Total Dose 200K RAD (Si)
鈥?SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
鈥?Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-Day
(Typ)
鈥?Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
鈥?Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
鈥?Latch-Up Free Under Any Conditions
鈥?Military Temperature Range: -55
o
C to +125
o
C
鈥?Signi鏗乧ant Power Reduction Compared to LSTTL ICs
鈥?DC Operating Voltage Range: 4.5V to 5.5V
鈥?LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
鈥?Input Current Levels Ii
鈮?/div>
5碌A(chǔ) at VOL, VOH
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK) MIL-STD-1835 CDFP3-F14, LEAD FINISH C
TOP VIEW
A1
B1
Y1
A2
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
B4
A4
Y4
B3
A3
Y3
Description
The Intersil HCTS86MS is a Radiation Hardened Quad 2-Input
Exclusive OR Gate. A high on any one input exclusively will
change the output to a High state.
The HCTS86MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of radia-
tion hardened, high-speed, CMOS/SOS Logic Family.
The HCTS86MS is supplied in a 14 lead Ceramic 鏗俛tpack
(K suf鏗亁) or a SBDIP Package (D suf鏗亁).
B2
Y2
GND
Functional Diagram
An
(1, 4, 9, 12)
Yn
(3, 6, 8, 11)
Bn
Ordering Information
PART
NUMBER
HCTS86DMSR
TEMPERATURE
RANGE
-55
o
C to +125
o
C
SCREENING
LEVEL
Intersil Class
S Equivalent
Intersil Class
S Equivalent
Sample
PACKAGE
14 Lead SBDIP
(2, 5, 10, 13)
TRUTH TABLE
INPUTS
An
L
L
H
H
Bn
L
H
L
H
OUTPUTS
Yn
L
H
H
L
HCTS86KMSR
-55
o
C to +125
o
C
14 Lead Ceramic
Flatpack
14 Lead SBDIP
HCTS86D/
Sample
HCTS86K/
Sample
HCTS86HMSR
+25
o
C
+25
o
C
Sample
14 Lead Ceramic
Flatpack
Die
+25
o
C
Die
NOTE: L = Logic Level Low, H = Logic level High
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
漏
Intersil Corporation 1999
Spec Number
File Number
1
518623
2249.2

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