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HCTS574HMSR Datasheet

  • HCTS574HMSR

  • Radiation Hardened Octal D-Type Flip-Flop, Three-State, Posi...

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  • INTERSIL   INTERSIL

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HCTS574MS
August 1995
Radiation Hardened Octal D-Type
Flip-Flop, Three-State, Positive Edge Triggered
Pinouts
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20
TOP VIEW
OE
D0
D1
D2
D3
D4
D5
D6
D7
1
2
3
4
5
6
7
8
9
20 VCC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 CP
Features
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3 Micron Radiation Hardened CMOS SOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-
Day (Typ)
Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Fanout (Over Temperature Range)
- Bus Driver O11utputs - 15 LSTTL Loads
Military Temperature Range: -55
o
C to +125
o
C
Signi鏗乧ant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
Input Current Levels Ii
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5碌A(chǔ) at VOL, VOH
GND 10
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Description
The Intersil HCTS574MS is a Radiation Hardened non-inverting
octal D-type, positive edge triggered 鏗俰p-鏗俹p with three-stateable
outputs. The HCTS574MS utilizes advanced CMOS/SOS
technology. The eight 鏗俰p-鏗俹ps enter data into their registers on
the LOW-to-HIGH transition of the clock (CP). Data is also
transferred to the outputs during this transition. The output
enable (OE) controls the three-state outputs and is independent
of the register operation. When the output enable is high, the
outputs are in the high impedance state.
The HCTS574MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS574MS is supplied in a 20 lead Ceramic 鏗俛tpack
(K suf鏗亁) or a SBDIP Package (D suf鏗亁).
OE
D0
D1
D2
Q3
Q4
D5
D6
Q7
GND
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20
TOP VIEW
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
CP
Ordering Information
PART NUMBER
HCTS574DMSR
HCTS574KMSR
HCTS574D/Sample
HCTS574K/Sample
HCTS574HMSR
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
+25
o
C
+25
o
C
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
20 Lead SBDIP
20 Lead Ceramic Flatpack
20 Lead SBDIP
20 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright 漏 Intersil Corporation 1999
Spec Number
File Number
694
518629
2359.2

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