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HCTS541KMSR Datasheet

  • HCTS541KMSR

  • Radiation Hardened Non-Inverting Octal Buffer/Line Driver, T...

  • 129.78KB

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  • INTERSIL   INTERSIL

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HCTS541MS
August 1995
Radiation Hardened Non-Inverting
Octal Buffer/Line Driver, Three-State
Pinouts
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20
TOP VIEW
OE1
A0
A1
A2
A3
A4
A5
A6
1
2
3
4
5
6
7
8
9
20 VCC
19 OE2
18 Y0
17 Y1
16 Y2
15 Y3
14 Y4
13 Y5
12 Y6
11 Y7
Features
鈥?3 Micron Radiation Hardened CMOS SOS
鈥?Total Dose 200K RAD (Si)
鈥?SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
鈥?Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/
Bit-Day (Typ)
鈥?Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
鈥?Dose Rate Upset >10
10
RAD
(Si)/s 20ns Pulse
鈥?Latch-Up Free Under Any Conditions
鈥?Fanout (Over Temperature Range)
- Bus Driver Outputs - 15 LSTTL Loads
鈥?Military Temperature Range:
-55
o
C to +125 C
o
A7
GND 10
鈥?Signi鏗乧ant Power Reduction Compared to LSTTL ICs
鈥?DC Operating Voltage Range: 4.5V to 5.5V
鈥?LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
鈥?Input Current Levels Ii
鈮?/div>
5碌A(chǔ) at VOL, VOH
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20
TOP VIEW
OE1
A0
A1
A2
A3
A4
A5
A6
A7
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
OE2
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Description
The Intersil HCTS541MS is a Radiation Hardened non-
inverting octal buffer/line driver, three-state outputs. The
output enable pins (OEN1 and OEN2) control the three-state
outputs. If either enable is high the outputs will be in the high
impedance state. For data output both enables (OEN1 and
OEN2) must be low.
The HCTS541MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS54 is supplied in a 20 lead Ceramic 鏗俛tpack
(K suf鏗亁) or a SBDIP Package (D suf鏗亁).
Ordering Information
PART NUMBER
HCTS541DMSR
HCTS541KMSR
HCTS541D/Sample
HCTS541K/Sample
HCTS541HMSR
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
+25
o
C
+25
o
C
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
20 Lead SBDIP
20 Lead Ceramic Flatpack
20 Lead SBDIP
20 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright 漏 Intersil Corporation 1999
Spec Number
File Number
682
518630
3073.1

HCTS541KMSR 產(chǎn)品屬性

  • 0現(xiàn)貨

  • 在售

  • -

  • 散裝

  • 在售

  • 緩沖器，非反向

  • 1

  • 8

  • -

  • 三態(tài)

  • 6mA，6mA

  • 4.5V ~ 5.5V

  • -55°C ~ 125°C（TA）

  • 表面貼裝型

  • 8-SOIC（0.154"，3.90mm 寬）

  • 8-SOIC

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